Indirect Addressing Of Timer/Counter Numbers - Omron SYSMAC CJ - REFERENCE MANUAL 01-2008 Reference Manual

Timer and Counter Instructions
CIO 000000
CIO 000205
1-s clock
pulse

3-6-13 Indirect Addressing of Timer/Counter Numbers

Example
1.0 s 1.5 s 1.0 s 1.5 s
Clock Pulse
The desired execution condition can be combined with a clock pulse to mimic
the clock pulse (0.1 s, 0.2 s, or 1.0 s).
1-s clock pulse
Timer and counter numbers can be indirectly addressed using Index Regis-
ters. When Index Registers will be used for indirect addressing, use
MOVRW(561) (MOVE TIMER/COUNTER PV TO REGISTER) to set the PLC
memory address of the desired timer or counter's PV to the desired Index
Register.
The following timers and counters can be indirectly addressed using Index
Registers: TIM, TIMX(550), TIMH(015), TIMHX(551), TTIM(087),
TTIMX(555), TMHH(540), TMHHX(552), TIMW(813), TIMWX(816),
TMHW(815), TMHWX(817), CNT, CNTX(546), CNTR(012), CNTRX(548),
CNTW(814), and CNTWX(818). (These are the timers and counters that use
timer and counter numbers.)
The timer or counter instruction will not be executed if the PLC memory
address in the specified Index Register is not the address of a timer or counter
PV.
Using Index Registers to indirectly address timers and counters can reduce
the size of the program and increase flexibility. For example, common subrou-
tines can be created.
The following example shows a program section that uses indirect addressing
to define and start 100 timers with SVs contained in D00100 through D00199.
Address Instruction Operands
000000 LD
000001 AND
000002 TIM
000003 LD
000004 TIM
000005 LD
000006 OUT
Address Instruction Operands
000000 LD 000000
000001 AND 1s
000002 OUT 000206
Section 3-6
000000
T0002
0001
#0010
000205
0002
#0015
T0001
000205
289