Timer and Counter Instructions
Operand Specifications
Description
Area
CIO Area
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Work Area
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Holding Bit Area
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Auxiliary Bit Area
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Timer Area
0000 to 4095 (decimal)
Counter Area
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DM Area
---
EM Area without bank
---
EM Area with bank
---
Indirect DM/EM
---
addresses in binary
Indirect DM/EM
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addresses in BCD
Constants
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Data Registers
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Index Registers
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Indirect addressing
,IR0 to ,IR15
using Index Registers
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
When the timer input is OFF, the timer specified by N is reset, i.e., the timer's
PV is reset to the SV and its Completion Flag is turned OFF.
When the timer input goes from OFF to ON, TIMH(015)/TIMHX(551) starts
decrementing the PV. The PV will continue timing down as long as the timer
input remains ON and the timer's Completion Flag will be turned ON when the
PV reaches 0000.
The status of the timer's PV and Completion Flag will be maintained after the
timer times out. To restart the timer, the timer input must be turned OFF and
then ON again or the timer's PV must be changed to a non-zero value (by
MOV(021), for example).
Timer input
Timer PV
Completion
Flag
The following timing chart shows the behavior of the timer's PV and Comple-
tion Flag when the timer input is turned OFF before the timer times out.
N
CIO 0000 to CIO 6143
W000 to W511
H000 to H511
A000 to A959
T0000 to T4095
C0000 to C4095
D00000 to D32767
E00000 to E32767
En_00000 to En_32767
(n = 0 to C)
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to
@ En_32767
(n = 0 to C)
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
BCD:
#0000 to 9999 (BCD)
"&" cannot be used.
Binary:
&0 to &65535 (decimal)
#0000 to #FFFF (hex)
DR0 to DR15
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SV
Section 3-6
S
251
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