Page 1 SYSMAC CS Series Cat. No. W394-E1-08 CS1G/H-CPU -EV1 CS1G/H-CPU CS1D-CPU CS1D-CPU SYSMAC CJ Series CJ1G-CPU CJ1G/H-CPU CJ1G-CPU CJ1M-CPU Programmable Controllers PROGRAMMING MANUAL...
Page 3 SYSMAC CS Series CS1G/H-CPU@@-EV1 CS1G/H-CPU@@H CS1D-CPU@@H CS1D-CPU@@S SYSMAC CJ Series CJ1G-CPU@@ CJ1G/H-CPU@@H CJ1G-CPU@@P CJ1M-CPU@@ Programmable Controllers Programming Manual Revised June 2005...
Page 4 Buyer indemnifies Omron against all related costs or expenses. rights of another party. 10. Force Majeure. Omron shall not be liable for any delay or failure in delivery 16. Property; Confidentiality. Any intellectual property in the Products is the exclu-...
Page 5 OMRON. No patent liability is assumed with respect to the use of the information contained herein. Moreover, because OMRON is con- stantly striving to improve its high-quality products, the information contained in this manual is subject to change without notice.
Page 6 Unit version Example for Unit version 3.0 Lot No. 040715 0000 Ver.3.0 OMRON Corporation MADE IN JAPAN • CS1-H, CJ1-H, and CJ1M CPU Units (except for low-end models) manu- factured on or before November 4, 2003 do not have a unit version given on the CPU Unit (i.e., the location for the unit version shown above is...
Page 7 Unit version Use the above display to confirm the unit version of the CPU Unit. Unit Manufacturing Information In the IO Table Window, right-click and select Unit Manufacturing informa- tion - CPU Unit. The following Unit Manufacturing information Dialog Box will be displayed.
Page 8 Unit version Use the above display to confirm the unit version of the CPU Unit connected online. Using the Unit Version The following unit version labels are provided with the CPU Unit. Labels These labels can be attached to the front of previous CPU Units to differenti- ate between CPU Units of different unit versions.
Page 9 Units on which a version is given (Ver. @.@) given Lot No. XXXXXX XXXX Ver. @ @ .@ Lot No. XXXXXX XXXX OMRON Corporation MADE IN JAPAN Meaning CS1H-CPU67H CPU Unit Ver. @.@ Designating individual Pre-Ver. 2.0 CS1-H CPU Units CPU Units (e.g., the...
Page 10 Unit Versions and Lot Numbers Series Model Data of manufacture Earlier Sept. 2003 Oct. 2003 Nov. 2003 Dec. 2003 Jun. 2004 Later CS1 CPU Units CS1@- Series CPU@@ No unit version CS1-V1 CPU CS1@- Units CPU@@-V1 No unit version CS1-H CPU Units CS1@- CPU@@H CPU Units Ver.
Page 11 Function Support by Unit Version CS1-H CPU Units (CS1@-CPU@@H) Function Unit version Pre-Ver. 2.0 CPU CPU Units Ver. 2.0 Units Downloading and Uploading Individual Tasks Improved Read Protection Using Passwords Write Protection from FINS Commands Sent to CPU Units via Net- works Online Network Connections without I/O Tables Communications through a Maximum of 8 Network Levels...
Page 12 CS1D CPU Units Function CS1D CPU Units for Duplex-CPU Systems CS1D CPU Units (CS1D-CPU@@H) for Single-CPU Systems (CS1D-CPU@@S) Pre-Ver. 1.1 CPU CPU Unit Ver. 1.1 CPU Unit Ver. 2.0 Units Functions Duplex CPU Units unique to Online Unit Replacement CS1D CPU Duplex Power Supply Units Units Duplex Controller Link Units...
Page 13 CJ1-H/CJ1M CPU Units Function CJ1-H CPU Units CJ1M CPU Units, CJ1M CPU (CJ1@-CPU@@H) except low-end models Units, low-end (CJ1M-CPU@@) models (CJ1M- CPU11/21) Pre-Ver. 2.0 CPU Units Ver. Pre-Ver. 2.0 CPU Units Ver. CPU Units Ver. CPU Units CPU Units Downloading and Uploading Individual Tasks Improved Read Protection Using Passwords...
Page 14 Functions Supported by Unit Version 3.0 or Later CS1-H CPU Units (CS1@-CPU@@H) Function Unit version Pre-Ver. 2.0, Ver. 2.0 Ver. 3.0 Function blocks (supported for CX-Programmer Ver. 5.0 or higher) Serial Gateway (converting FINS commands to CompoWay/F com- mands at the built-in serial port) Comment memory (in internal flash memory) Expanded simple backup data New Applica-...
Page 15 Unit Versions and Programming Devices CX-Programmer version 4.0 or higher must be used to enable using the func- tions added for CPU Unit version 2.0. CX-Programmer version 5.0 or higher must be used to enable using function blocks added for CPU Unit version 3.0. The following tables show the relationship between unit versions and CX-Pro- grammer versions.
Page 16 Troubleshooting Problems with Unit Versions on the CX-Programmer Problem Cause Solution An attempt was made using CX- Check the program or change Programmer version 4.0 or higher the CPU Unit being down- to download a program contain- loaded to a CPU Unit Ver. 2.0 ing instructions supported only by or later.
Page 17 TABLE OF CONTENTS PRECAUTIONS ........xxvii Intended Audience .
Page 18: Table Of Contents
TABLE OF CONTENTS 3-27 Debugging Instructions ........... . . 3-28 Failure Diagnosis Instructions.
Page 19 About this Manual: This manual describes the programming of the CPU Units for CS/CJ-series Programmable Controllers (PLCs) and includes the sections described on the following page. The CS Series and CJ Series are subdivided as shown in the following table. Unit CS Series CJ Series...
Page 20 About this Manual, Continued Name Cat. No. Contents SYSMAC CS/CJ Series W394 This manual describes programming and other CS1G/H-CPU@@-EV1, CS1G/H-CPU@@H, CS1D- methods to use the functions of the CS/CJ-series CPU@@H, CS1D-CPU@@S, CJ1G-CPU@@, CJ1M- PLCs. (This manual) CPU@@, CJ1G-CPU@@P, CJ1G/H-CPU@@H Programmable Controllers Programming Manual SYSMAC CS Series W339 Provides an outlines of and describes the design,...
Page 21 Boards to perform serial communications SCU21-V1/41-V1 with external devices, including the usage of stan- Serial Communications Boards/Units Operation Manual dard system protocols for OMRON products. SYSMAC WS02-PSTC1-E W344 Describes the use of the CX-Protocol to create CX-Protocol Operation Manual protocol macros as communications sequences to communicate with external devices.
Page 22 xxii...
Page 23 WHETHER SUCH CLAIM IS BASED ON CONTRACT, WARRANTY, NEGLIGENCE, OR STRICT LIABILITY. In no event shall the responsibility of OMRON for any act exceed the individual price of the product on which liability is asserted. IN NO EVENT SHALL OMRON BE RESPONSIBLE FOR WARRANTY, REPAIR, OR OTHER CLAIMS...
Page 24 Application Considerations SUITABILITY FOR USE OMRON shall not be responsible for conformity with any standards, codes, or regulations that apply to the combination of products in the customer's application or use of the products. At the customer's request, OMRON will provide applicable third party certification documents identifying ratings and limitations of use that apply to the products.
Page 25 Performance data given in this manual is provided as a guide for the user in determining suitability and does not constitute a warranty. It may represent the result of OMRON's test conditions, and the users must correlate it to actual application requirements. Actual performance is subject to the OMRON Warranty and Limitations of Liability.
Page 26 xxvi...
Page 27 PRECAUTIONS This section provides general precautions for using the CS/CJ-series Programmable Controllers (PLCs) and related devices. The information contained in this section is important for the safe and reliable application of Programmable Controllers. You must read this section and understand the information contained before attempting to set up or operate a PLC system.
Page 28: Intended Audience
It is extremely important that a PLC and all PLC Units be used for the speci- fied purpose and under the specified conditions, especially in applications that can directly or indirectly affect human life. You must consult with your OMRON representative before applying a PLC System to the above-mentioned appli- cations.
Page 29 Safety Precautions !WARNING Do not touch any of the terminals or terminal blocks while the power is being supplied. Doing so may result in electric shock. !WARNING Do not attempt to disassemble, repair, or modify any Units. Any attempt to do so may result in malfunction, fire, or electric shock.
Page 30: Operating Environment Precautions
Operating Environment Precautions !Caution Tighten the screws on the terminal block of the AC Power Supply Unit to the torque specified in the operation manual. The loose screws may result in burning or malfunction. !Caution Do not touch the Power Supply Unit when power is being supplied or immedi- ately after the power supply is turned OFF.
Page 31 Application Precautions A Programming Console can, however, be used to edit multitask pro- grams originally created with the CX-Programmer. !WARNING Always heed these precautions. Failure to abide by the following precautions could lead to serious or possibly fatal injury. • Always connect to a ground of 100 Ω or less when installing the Units. Not connecting to a ground of 100 Ω...
Page 32 Application Precautions • Always turn ON power to the PLC before turning ON power to the control system. If the PLC power supply is turned ON after the control power sup- ply, temporary errors may result in control system signals because the output terminals on DC Output Units and other Units will momentarily turn ON when power is turned ON to the PLC.
Page 33 Application Precautions • Separate the line ground terminal (LG) from the functional ground termi- nal (GR) on the Power Supply Unit before performing withstand voltage tests or insulation resistance tests. Not doing so may result in burning. • Install the Units properly as specified in the operation manuals. Improper installation of the Units may result in malfunction.
Page 34: Conformance To Ec Directives
Concepts EMC Directives OMRON devices that comply with EC Directives also conform to the related EMC standards so that they can be more easily built into other devices or the overall machine. The actual products have been checked for conformity to EMC standards (see the following note).
Page 35: Conformance To Ec Directives
Conformance to EC Directives the equipment or control panel on which the OMRON devices are installed. The customer must, therefore, perform the final check to confirm that devices and the overall machine conform to EMC standards. Note Applicable EMC (Electromagnetic Compatibility) standards are as follows:...
Page 36 Conformance to EC Directives Countermeasure Examples When switching an inductive load, connect an surge protector, diodes, etc., in parallel with the load or contact as shown below. Circuit Current Characteristic Required element If the load is a relay or solenoid, there is The capacitance of the capacitor must CR method be 1 to 0.5 μF per contact current of...
Page 37: Cpu Unit Operation
SECTION 1 CPU Unit Operation This section describes the basic structure and operation of the CPU Unit. Initial Setup (CS1 CPU Units Only) ....... . Using the Internal Clock (CS1 CPU Units Only) .
Page 38: Initial Setup (Cs1 Cpu Units Only)
Section 1-1 Initial Setup (CS1 CPU Units Only) Initial Setup (CS1 CPU Units Only) Battery Installation Before using a CS1CPU Unit, you must install the Battery Set in the CPU Unit using the following procedure. 1,2,3... 1. Insert a flat-blade screwdriver in the small gap at the bottom of the battery compartment and flip the cover upward to open it.
Page 39 Initial Setup (CS1 CPU Units Only) Section 1-1 2. Hold the Battery Set with the cable facing outward and insert it into the bat- tery compartment. Battery compartment 3. Connect the battery connector to the battery connector terminals. Connect the red wire to the top and the white wire to the bottom terminal. There are two sets of battery connector terminals;...
Page 40 Section 1-1 Initial Setup (CS1 CPU Units Only) 4. Fold in the cable and close the cover. Clearing Memory After installing the battery, clear memory using the memory clear operation to initialize the RAM inside the CPU Unit. Programming Console Use the following procedure from a Programming Console.
Page 41: Using The Internal Clock (Cs1 Cpu Units Only)
Using the Internal Clock (CS1 CPU Units Only) Section 1-2 Using the Internal Clock (CS1 CPU Units Only) The internal clock of the CPU Unit is set to “00 year, 01 month, 01 day (00-01- 01), 00 hours, 00 minutes, 00 seconds (00:00:00), and Sunday (SUN)” when the Battery Set is mounted in the CS-series CPU Unit.
Page 42: Internal Structure Of The Cpu Unit
Internal Structure of the CPU Unit Section 1-3 Internal Structure of the CPU Unit 1-3-1 Overview The following diagram shows the internal structure of the CPU Unit. The programm is divided CPU Unit Task 1 into tasks and the tasks are executed in order by Task 2 task number.
Page 43: Block Diagram Of Cpu Unit Memory
Section 1-3 Internal Structure of the CPU Unit I/O Memory I/O memory is the RAM area used for reading and writing from the user pro- gram. It is comprised of one area that is cleared when power is turned ON and OFF, and another area that will retain data.
Page 44 Internal Structure of the CPU Unit Section 1-3 CPU Unit Built-in RAM I/O memory area Flash Memory Drive 1: EM file memory (CS1-H, CJ1-H, CJ1M, or (See note 2.) CS1D CPU Units only) Backup Automatic User program User program Battery write A newly mounted battery will be good up to five years at an ambient temperature of 25°C...
Page 45: Operating Modes
Operating Modes Section 1-4 Operating Modes 1-4-1 Description of Operating Modes The following operating modes are available in the CPU Unit. These modes control the entire user program and are common to all tasks. PROGRAM Mode Program execution stops in PROGRAM mode, and the RUN indicator is not lit. This mode is used when editing the program or making other preparations operation, such as the following: •...
Page 46: Initialization Of I/O Memory
Operating Modes Section 1-4 Programming Device operations like monitoring the status of program execu- tion (monitoring programs and monitoring I/O memory) are enabled. Use this mode for normal system operation. Task execution is the same as in MONITOR mode. See 10-2 CPU Unit Operating Modes in the Operation Manual for more details on operations that are available in each operating mode.
Page 47: Startup Mode
Section 1-4 Operating Modes 1-4-3 Startup Mode Refer to the Operation Manual for details on the Startup Mode setting for the CPU Unit. Note With CJ1, CS1-H, CJ1-H, CJ1M, or CS1D CPU Units, the CPU Unit will start in RUN Mode if a Programming Console is not connected. This differs from the default operation for a CS1 CPU Unit, which will start in PROGRAM Mode by default if a Programming Console is not connected.
Page 48: Programs And Tasks
A. When execution of program B is completed, the rest of program A would be executed from the place where execution was interrupted. With earlier OMRON PLCs, one continuous program is formed from several continuous parts. The programs allocated to each task are single programs that terminate with an END instruction, just like the single program in earlier PLCs.
Page 49 Programs and Tasks Section 1-5 One feature of the cyclic tasks is that they can be enabled (executable status) and disabled (standby status) by the task control instructions. This means that several program components can be assembled as a task, and that only spe- cific programs (tasks) can then be executed as needed for the current product model or process being performed (program step switching).
Page 50: Description Of Tasks
Section 1-6 Description of Tasks • A card that is activated will remain activated and will be read in subse- quent sequences. A card that is deactivated will remain deactivated and will be skipped until it is reactivated by another card. Earlier program: CS/CJ-series program: Like a scroll...
Page 51 Description of Tasks Section 1-6 Note 1. CJ1 CPU Units do not currently support I/O interrupt tasks and external in- terrupt tasks. The maximum number of tasks for a CJ1 CPU Unit is thus 35, i.e., 32 cyclic tasks and 3 interrupt tasks. The total number of programs that can be created and managed is also 35.
Page 52 Description of Tasks Section 1-6 Standard subroutine programs User program ABC User program ABD Task 1 (A) Task 1 (A) Task 2 (B) Task 2 (B) Task 3 (C) Task 3 (D) When creating modular programs, addresses can be specified by symbols to facilitate standardization.
Page 53 Section 1-6 Description of Tasks Put task 1 on Start task 1 standby when when a is b is ON. Task 0 Task 0 Task 0 Task 1 Task 1 Task 1 Task 2 Task 2 Task 2 Task 3 Task 3 Task 3 Start tasks...
Page 54 Description of Tasks Section 1-6 Task Execution Time While a task is on standby, instructions in that task are not executed, so their OFF instruction execution time will not be added to the cycle time. Note From this standpoint, instructions in a task that is on standby are just like instructions in a jumped program section (JMP-JME).
Page 55: Programming
SECTION 2 Programming This section basic information required to write, check, and input programs. Basic Concepts ..........2-1-1 Programs and Tasks .
Page 56: Basic Concepts
Basic Concepts Section 2-1 Basic Concepts 2-1-1 Programs and Tasks CS/CJ-series PLCs execute ladder-diagram programs contained in tasks. The ladder-diagram program in each task ends with an END(001) instruction just as with conventional PLCs. Tasks are used to determine the order for executing the ladder-diagram pro- grams, as well as the conditions for executing interrupts.
Page 57: Basic Information On Instructions
Section 2-1 Basic Concepts 2-1-2 Basic Information on Instructions Programs consist of instructions. The conceptual structure of the inputs to and outputs from an instruction is shown in the following diagram. Power flow (P.F., execution condition) * Power flow (P.F., execution condition) Instruction Instruction condition * Instruction condition...
Page 58 Section 2-1 Basic Concepts are reset (canceled) at the start of each task, i.e., they are reset when the task changes. The following instructions are used in pairs to set and cancel certain instruc- tion conditions. These paired instructions must be in the same task. Instruction Description Setting...
Page 59: Instruction Location And Execution Conditions
Basic Concepts Section 2-1 Note Operands are also called the first operand, second operand, and so on, start- ing from the top of the instruction. First operand Second operand 2-1-3 Instruction Location and Execution Conditions The following table shows the possible locations for instructions. Instructions are grouped into those that do and those do not require execution conditions.
Page 60: Addressing I/O Memory Areas
Section 2-1 Basic Concepts 2-1-4 Addressing I/O Memory Areas Bit Addresses @@@@ @@ Bit number (00 to 15) Indicates the word address. Example: The address of bit 03 in word 0001 in the CIO Area would be as shown below. This address is given as “CIO 000103” in this manual. 0001 03 Bit number (03) Word address: 0001...
Page 61: Specifying Operands
Basic Concepts Section 2-1 Example: The address of word 2000 in the current bank of the Extended Data Memory would be as follows: E00200 Word address The address of word 2000 in the bank 1 of the Extended Data Memory would be as follows: E1_00200 Word address...
Page 62 Basic Concepts Section 2-1 Operand Description Notation Application examples Specifying The offset from the beginning of the area is indirect DM/ specified. The contents of the address will be EM addresses treated as binary data (00000 to 32767) to specify the word address in Data Memory (DM) in Binary or Extended Data Memory (EM).
Page 63 Section 2-1 Basic Concepts Operand Description Notation Application examples Specifying MOV #0001 The offset from the beginning of the area is *D00200 indirect DM/ *D00200 specified. The contents of the address will be EM addresses treated as BCD data (0000 to 9999) to specify Contents 0 1 0 0 the word address in Data Memory (DM) or Ex-...
Page 64 Basic Concepts Section 2-1 Data Operand Data form Symbol Range Application example 16-bit con- All binary data or Unsigned binary #0000 to #FFFF stant a limited range of Signed decimal ± –32768 to binary data +32767 Unsigned deci- & (See Note.) &0 to &65535 All BCD data or a #0000 to #9999...
Page 65 Basic Concepts Section 2-1 ASCII Characters Bits 0 to 3 Bits 4 to 7 Binary 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0000 Space 0001 ” ” 0010 0011 0100 0101 &...
Page 66: Data Formats
Basic Concepts Section 2-1 2-1-6 Data Formats The following table shows the data formats that the CS/CJ Series can handle. Data type Data format Decimal 4-digit hexadecimal Unsigned 0 to 0000 to FFFF 15 14 13 12 11 10 9 binary 65535 Binary...
Page 67 Basic Concepts Section 2-1 Data type Data format Decimal 4-digit hexadecimal Single-pre- 31 30 29 20 19 18 17 cision floating- point deci- Sign of Exponent Mantissa mantissa Binary Exponent Sign x 1.[Mantissa] x 2 Value = (−1) 1: negative or 0: positive Sign (bit 31) Mantissa The 23 bits from bit 00 to bit 22 contain the mantissa,...
Page 68 Basic Concepts Section 2-1 1111 1111 1111 1111 True number 0000 0000 0001 0011 −) 1111 1111 1110 1100 0000 0000 0000 0001 Two's complement 1111 1111 1110 1101 Complements Generally the complement of base x refers to a number produced when all digits of a given number are subtracted from x –...
Page 69 Basic Concepts Section 2-1 SIGNED BINARY-TO-BCD: BCDS(471), and DOUBLE SIGNED BINARY-TO- BCD: BDSL(473). Refer to the CS/CJ-series Programmable Controllers Instructions Reference Manual (W340) for more information. Decimal Hexadecimal Binary 0000 0000 0001 0001 0010 0010 0011 0011 0100 0100 0101 0101 0110 0110...
Page 70: Instruction Variations
Basic Concepts Section 2-1 2-1-7 Instruction Variations The following variations are available for instructions to differentiate executing conditions and to refresh data when the instruction is executed (immediate refresh). Variation Symbol Description Differentiation Instruction that differentiates when the execu- tion condition turns ON. OFF % Instruction that differentiates when the execu- tion condition turns OFF.
Page 71 Basic Concepts Section 2-1 Input-differentiated Instructions Upwardly Differentiated Instructions (Instruction Preceded by @) • Output Instructions: The instruction is executed only during the cycle in which the execution condition turned ON (OFF → ON) and are not exe- cuted in the following cycles. Example (@) Upwardly-differ @MOV...
Page 72 Basic Concepts Section 2-1 • Input Instructions (Logical Starts and Intermediate Instructions): The instruction reads bit status, makes comparisons, tests bits, or perform other types of processing every cycle and will output the execution condi- tion (power flow) when results switch from ON to OFF. The execution con- dition will turn OFF the next cycle.
Page 73: I/O Instruction Timing
Basic Concepts Section 2-1 2-1-9 I/O Instruction Timing The following timing chart shows different operating timing for individual instructions using a program comprised of only LD and OUT instructions. Input read Input read Input read Input read Input read Input read Input read...
Page 74 Basic Concepts Section 2-1 • Use in Interlocks (IL - ILC Instructions) In the following example, the previous value flag for the differentiated instruction maintains the previous interlocked value and will not output a differentiated output at point A because the value will not be updated while the interlock is in effect.
Page 75: Refresh Timing
Basic Concepts Section 2-1 2-1-10 Refresh Timing The following methods are used to refresh external I/O. • Cyclic refresh • Immediate refresh (! specified instruction, IORF instruction) Refer to the section on CPU Unit operation in the CS/CJ Series Operation Manual for details on the I/O refresh.
Page 76 Basic Concepts Section 2-1 • When a word operand is specified for an instruction, I/O will be refreshed for the 16 bits that are specified. • Inputs will be refreshed for input or source operand just before an instruc- tion is executed. •...
Page 77 Section 2-1 Basic Concepts Units Refreshed for An I/O REFRESH (IORF(097)) instruction that refreshes real I/O data in a specified word range is available as a special instruction. All or just a specified IORF(097) or DLNK(226) range of real I/O data can be refreshed during a cycle with this instruction. IORF can also be used to refresh words allocated to Special I/O Units.
Page 78: Program Capacity
5k steps Note Memory capacity for CS/CJ-series PLCs is measured in steps, whereas memory capacity for previous OMRON PLCs, such as the C200HX/HG/HE and CV-series PLCs, was measured in words. Refer to the information at the end of10-5 Instruction Execution Times and Number of Steps in the Operation Manual for your PLC for guidelines on converting program capacities from previous OMRON PLCs.
Page 79 Basic Concepts Section 2-1 General Structure of the A ladder diagram consists of left and right bus bars, connecting lines, input Ladder Diagram bits, output bits, and special instructions. A program consists of one or more program runs. A program rung is a unit that can be partitioned when the bus is split horizontally.
Page 80 Section 2-1 Basic Concepts Basic Ladder Program Concepts 1,2,3... 1. When ladder diagrams are executed by PLCs, the signal flow (power flow) is always from left to right. Programming that requires power flow from right to left cannot be used. Thus, flow is different from when circuits are made up of hard-wired control relays.
Page 81 Basic Concepts Section 2-1 5. Output bits can also be used as input bits. 0002 0002 Restrictions 1,2,3... 1. A ladder program must be closed so that signals (power flow) will flow from the left bus bar to the right bus bar. A rung error will occur if the program is not closed (but the program can be executed).
Page 82 Basic Concepts Section 2-1 3. An input bit must always be inserted before and never after an output in- struction like an output bit. If it is inserted after an output instruction, then a location error will occur during a Programming Device program check. 0000 0000 0002...
Page 83: Inputting Mnemonics
Section 2-1 Basic Concepts • Debugging programs will run much smoother if an END(001) instruction is inserted at various break points between sequence rungs and the END(001) instruction in the middle is deleted after the program is checked. Task (program) Task (program) 000000 000000...
Page 84 Basic Concepts Section 2-1 1,2,3... 1. First separate the rung into small blocks (a) to (f). 0000 0000 0000 0000 0000 0000 0005 0010 0010 0000 0005 0000 0000 0000 0000 0010 0010 0000 0000 0000 0005...
Page 85 Basic Concepts Section 2-1 • Program the blocks from top to bottom and then from left to right. 0000 0000 0010 0010 LD 000000 LD 001000 AND 000001 AND 001001 OR LD 0005 0000 0000 OR 000500 LD 000004 AND 000005 0000 0000 0000...
Page 86: Program Examples
Basic Concepts Section 2-1 2-1-14 Program Examples 1,2,3... 1. Parallel/Series Rungs 0000 0000 0000 0000 0002 Instruction Operands 000000 0002 000001 000200 000002 AND NOT 000003 A block B block 000200 Program the parallel instruction in the A block and then the B block. 2.
Page 87 Basic Concepts Section 2-1 3. Example of series connection in a series rung Instruction Operands A1 block B1 block 000000 0000 0000 0000 0000 0002 AND NOT 000001 LD NOT 000002 0000 0002 0002 0002 000003 OR LD 000004 000005 000006 A2 block B2 block...
Page 88 Basic Concepts Section 2-1 4. Complex Rungs 0000 0000 0000 0000 0002 Instruction Operand 000000 0000 0000 000001 0000 0000 000002 000003 0000 0000 OR LD The diagram above is based on the diagram below. AND LD 0000 0000 0000 000004 000005 OR LD...
Page 89 Basic Concepts Section 2-1 Instruction Operand Reset input 0000 0000 000000 H00000 000001 000002 0000 H00000 000003 10 sec AND NOT Error input 0001 #0100 H00000 0002 0000 0001 T0001 0100 Error display T0001 H00000 000206 If a holding bit is in use, the ON/OFF status would be held in memory even if the power is turned OFF, and the error signal would still be in effect when power is turned back ON.
Page 90 Basic Concepts Section 2-1 Mnemonic Execution Order PLCs execute ladder programs in the order the mnemonics are entered so instructions may not operate as expected, depending on the way rungs are written. Always consider mnemonic execution order when writing ladder dia- grams.
Page 91: Precautions
Precautions Section 2-2 Precautions 2-2-1 Condition Flags Using Condition Flags Conditions flags are shared by all instructions, and will change during a cycle depending on results of executing individual instructions. Therefore, be sure to use Condition Flags on a branched output with the same execution condi- tion immediately after an instruction to reflect the results of instruction execu- tion.
Page 92 Precautions Section 2-2 Using Execution Results in N.C. and N.C. Inputs The Condition Flags will pick up instruction B execution results as shown in the example below even though the N.C. and N.O. input bits are executed from the same output branch. Instruction A Incorrect Reflects instruction A execution...
Page 93 Precautions Section 2-2 Example: The following example will move #0200 to D00200 if D00100 con- tains #0010 and move #0300 to D00300 if D00100 does not contain #0010. Incorrect Reflects CMP execution results. Reflects MOV execution results. The Equals Flag will turn ON if D00100 in the rung above contains #0010. #0200 will be moved to D00200 for instruction (1), but then the Equals Flag will be turned OFF because the #0200 source data is not 0000 Hex.
Page 94 Precautions Section 2-2 Using Execution Results from Differentiated Instructions With differentiated instructions, execution results for instructions are reflected in Condition Flags only when execution condition is met, and results for a pre- vious rung (rather than execution results for the differentiated instruction) will be reflected in Condition Flags in the next cycle.
Page 95 Precautions Section 2-2 When the ER Flag is ON, the status of other Condition Flags, such as the <, >, OF, and UF Flags, will not change and status of the = and N Flags will vary from instruction to instruction. Refer to the descriptions of individual instructions in the CS/CJ-series Pro- grammable Controllers Instructions Reference Manual (W340) for the condi- tions that will cause the ER Flag to turn ON.
Page 96: Special Program Sections
Precautions Section 2-2 As an example, consider the results of executing a block transfer with XFER(070) if 20 words are specified for transfer beginning with W500. Here, the Work Area, which ends at W511, will be exceeded, but the instruction will be executed without turning ON the Error Flag.
Page 97 Precautions Section 2-2 Note Instructions that specify program areas cannot be used for programs in other tasks. Refer to 4-2-2 Task Instruction Limitations for details. Subroutines Place all the subroutines together just before the END(001) instruction in all programs but after programming other than subroutines. (Therefore, a subrou- tine cannot be placed in a step ladder, block program, FOR - NEXT, or JMP0 - JME0 section.) If a program other than a subroutine program is placed after a subroutine program (SBN to RET), that program will not be executed.
Page 98 Precautions Section 2-2 Instructions Not Available in Step Ladder Program Function Mnemonic Instruction Sections Sequence Control FOR(512), NEXT(513), and FOR, NEXT, and BREAK BREAK(514) LOOP END(001) IL(002) and ILC(003) INTERLOCK and INTER- LOCK CLEAR JMP(004) and JME(005) JUMP and JUMP END CJP(510) and CJPN(511) CONDITIONAL JUMP and CONDITIONAL JUMP NOT...
Page 99 Precautions Section 2-2 Instructions Not Available The following instructions cannot be placed in block program sections. in Block Program Sections Classification by Mnemonic Instruction Function Sequence Control FOR(512), NEXT(513), FOR, NEXT, and BREAK and BREAK(514) LOOP END(001) IL(002) and ILC(003) INTERLOCK and INTER- LOCK CLEAR JMP0(515) and JME0(516) MULTIPLE JUMP and...
Page 100: Checking Programs
Checking Programs Section 2-3 Checking Programs CS/CJ-series programs can be checked at the following stages. • Input check during Programming Console input operations • Program check by CX-Programmer • Instruction check during execution • Fatal error check (program errors) during execution 2-3-1 Errors during Programming Device Input Programming Console...
Page 101 Checking Programs Section 2-3 Area Check Operand ranges Operand area ranges Operand data types Access check for read-only words Operand range checks, including the following. • Constants (#, &, +, –) • Control codes • Area boundary checks for multi-word operands •...
Page 102: Program Execution Check
Checking Programs Section 2-3 Multi-word Operands Memory area boundaries are checked for multi-word operands for the pro- gram check as shown in the following table. CX-Programmer Programming Consoles The following functionality is provided by the CX-Programmer Checked when pro- for multi-word operands that exceed a memory area boundary. grams are input, i.e., operands that •...
Page 103 Checking Programs Section 2-3 Illegal Access Errors Illegal access errors indicate that the wrong area was accessed in one of the following ways when the address specifying the instruction operand was accessed. a) A read or write was executed for a parameter area. b) A write was executed in a memory area that is not mounted (see note).
Page 104: Checking Fatal Errors
Checking Programs Section 2-3 In the rare even that this error does occur, it will be treated as a program error, operation will stop (fatal error), and the UM Overflow Flag (A29515) will turn 2-3-4 Checking Fatal Errors The following errors are fatal program errors and the CPU Unit will stop run- ning if one of these occurs.
Page 105 Checking Programs Section 2-3 Program error Description Related flags No END Instruction An END instruction is not present in the The No END Flag (A29511) turns ON. program. Error During Task Execution No task is ready in the cycle. The Task Error Flag (29512) turns ON. No program is allocated to a task.
Page 106 Checking Programs Section 2-3...
Page 107: Instruction Functions
SECTION 3 Instruction Functions This section outlines the instructions that can be used to write user programs. Sequence Input Instructions ..........Sequence Output Instructions .
Page 108: Sequence Input Instructions
Section 3-1 Sequence Input Instructions Sequence Input Instructions : Not supported by CS1D CPU Units for Duplex-CPU Systems. : Supported by CS1-H, CJ1-H, CJ1M, and CS1D CPU Units only. : Supported by CS1-H, CJ1-H, and CJ1M CPU Units only. Instruction Symbol/Operand Function Location...
Page 109 Section 3-1 Sequence Input Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code AND LOAD Continues on rung Takes a logical AND between logic blocks. Logic block Logic block AND LD Required Logic block A Logic block B Serial connection between logic block A and AND LD logic block B.
Page 110: Sequence Output Instructions
Section 3-2 Sequence Output Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BIT TEST LD TST(350), AND TST(350), and OR TST(350) are used in the pro- Continues on rung TST(350) gram like LD, AND, and OR; the execution condition is ON when the OR TST Required specified bit in the specified word is ON and OFF when the bit is OFF.
Page 111 Section 3-2 Sequence Output Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DIFFERENTIATE Output DIFD(014) turns the designated bit ON for one cycle when the DIFD(014) DOWN Required execution condition goes from ON to OFF (falling edge). DIFD !DIFD Execution condition B: Bit Status of B...
Page 112 Section 3-2 Sequence Output Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SINGLE BIT RSTB(533) turns OFF the specified bit in the specified word when the Output RSTB(533) RESET (CS1-H, execution condition is ON. Required CJ1-H, CJ1M, or Unlike the RSET instruction, RSTB(533) can be used to reset a bit in a CS1D only) DM or EM word.
Page 113: Sequence Control Instructions
Section 3-3 Sequence Control Instructions Sequence Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code Output Indicates the end of a program. END(001) Not required END(001) completes the execution of a program for that cycle. No instructions written after END(001) will be executed. Execution proceeds to the program with the next task number.
Page 114 Section 3-3 Sequence Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code INTERLOCK All outputs between IL(002) and ILC(003) are interlocked when the Output ILC(003) CLEAR execution condition for IL(002) is OFF. IL(002) and ILC(003) are nor- Not required mally used in pairs.
Page 115 Section 3-3 Sequence Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code CONDITIONAL Output The operation of CJP(510) is the basically the opposite of JMP(004). CJP(510) JUMP Required When the execution condition for CJP(510) is ON, program execution jumps directly to the first JME(005) in the program with the same jump number.
Page 116 Section 3-3 Sequence Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FOR-NEXT Output The instructions between FOR(512) and NEXT(513) are repeated a LOOPS FOR(512) Not required specified number of times. FOR(512) and NEXT(513) are used in pairs. N: Number of Repeated N times loops Repeated program section...
Page 117: Timer And Counter Instructions
Section 3-4 Timer and Counter Instructions Timer and Counter Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code TIMER Output TIM/TIMX(550) operates a decrementing timer with units of 0.1-s. Required The setting range for the set value (SV) is 0 to 999.9 s for BCD (BCD) and 0 to 6,553.5 s for binary (decimal or hexadecimal).
Page 118 Section 3-4 Timer and Counter Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ACCUMULATIVE Output Timer TTIM(087)/TTIMX(555) operates an incrementing timer with units of TTIM(087) TIMER input Required 0.1-s. The setting range for the set value (SV) is 0 to 999.9 s for TTIM BCD and 0 to 6,553.5 s for binary (decimal or hexadecimal).
Page 119 Section 3-4 Timer and Counter Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MULTI-OUTPUT Output MTIM(543)/MTIMX(554) operates a 0.1-s incrementing timer with 8 MTIM(543) TIMER Required independent SVs and Completion Flags. The setting range for the MTIM set value (SV) is 0 to 999.9 s for BCD and 0 to 6,553.5 s for binary (decimal or hexadecimal).
Page 120 Section 3-4 Timer and Counter Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code REVERSIBLE Output Incre- CNTR(012)/CNTRX(548) operates a reversible counter. CNTR(012) COUNTER Required ment CNTR input Decre- Increment input (BCD) ment input Reset CNTRX Decrement input input (Binary) N: Counter (CS1-H, CJ1-H, number...
Page 121: Comparison Instructions
Section 3-5 Comparison Instructions Comparison Instructions : Not supported by CS1D CPU Units for Duplex-CPU Systems. Instruction Symbol/Operand Function Location Mnemonic Execution condition Code Symbol Compari- LD: Not required Symbol comparison instructions (unsigned) compare two values son (Unsigned) Symbol & options AND, OR: (constants and/or the contents of specified words) in 16-bit binary Required...
Page 122 Section 3-5 Comparison Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code Symbol Compari- : Comparison Symbol comparison instructions (double-word, signed) compare two LD: Not required son (Double- values (constants and/or the contents of specified double-word data) in data 1 AND, OR: word, signed) signed 32-bit binary (8-digit hexadecimal) and create an ON execution...
Page 123 Section 3-5 Comparison Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SIGNED BINARY Output Compares two signed binary values (constants and/or the contents of CPS(114) COMPARE Required specified words) and outputs the result to the Arithmetic Flags in the Auxiliary Area.
Page 124 Section 3-5 Comparison Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code EXPANDED Compares the source data to up to 256 ranges (defined by upper and Output BCMP2(502) BLOCK COM- lower limits) and turns ON the corresponding bit in the result word when Required PARE the source data is within a range.
Page 125: Data Movement Instructions
Section 3-6 Data Movement Instructions Data Movement Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MOVE Output Transfers a word of data to the specified word. MOV(021) Required @MOV Source word !MOV !@MOV S: Source D: Destination Bit status not changed.
Page 126 Section 3-6 Data Movement Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MOVE DIGIT Output Transfers the specified digit or digits. (Each digit is made up of 4 bits.) MOVD(083) MOVD Required @MOVD S: Source word or data C: Control word D: Destination word MULTIPLE BIT...
Page 127 Section 3-6 Data Movement Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE DATA Output Exchanges the contents of a pair of consecutive words with another XCGL(562) EXCHANGE Required pair of consecutive words. XCGL @XCGL E1+1 E2+1 E1: 1st exchange word E2: Second exchange word...
Page 128: Data Shift Instructions
Section 3-7 Data Shift Instructions Data Shift Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SHIFT REGISTER Output Data Operates a shift register. SFT(010) input Required St+1, St+2 Shift input Reset input Status of data Lost St: Starting word input for each E: End word shift input...
Page 129 Section 3-7 Data Shift Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE SHIFT Output Shifts the contents of Wd and Wd +1 one bit to the left. ASLL(570) LEFT Required ASLL Wd+1 @ASLL Wd: Word ARITHMETIC Output Shifts the contents of Wd one bit to the right. ASR(026) SHIFT RIGHT Required...
Page 130 Section 3-7 Data Shift Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ROTATE RIGHT Output Shifts all Wd bits one bit to the right not including the Carry Flag (CY). WITHOUT RRNC(575) Required The contents of the rightmost bit of Wd shifts to the leftmost bit and to CARRY the Carry Flag (CY).
Page 131 Section 3-7 Data Shift Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SHIFT N-BITS Output Shifts the specified 16 bits of word data to the left by the specified NASL(580) LEFT Required number of bits. NASL @NASL D: Shift word Shift n-bits C: Control word Contents of...
Page 132: Increment/Decrement Instructions
Section 3-8 Increment/Decrement Instructions Increment/Decrement Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code INCREMENT Output Increments the 4-digit hexadecimal content of the specified word by 1. BINARY ++(590) Required Wd: Word DOUBLE INCRE- Output Increments the 8-digit hexadecimal content of the specified words by MENT BINARY ++L(591) Required...
Page 133: Symbol Math Instructions
Section 3-9 Symbol Math Instructions Symbol Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SIGNED BINARY Output Adds 4-digit (single-word) hexadecimal data and/or constants. +(400) ADD WITHOUT Required CARRY (Signed binary) (Signed binary) CY will turn ON when there is a (Signed binary) Au: Augend word carry.
Page 134 Section 3-9 Symbol Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE BCD Output Adds 8-digit (double-word) BCD data and/or constants. +BL(405) ADD WITHOUT Required CARRY Au+1 (BCD) @+BL (BCD) Ad+1 CY will turn ON (BCD) Au: 1st augend when there is a word carry.
Page 135 Section 3-9 Symbol Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SIGNED BINARY Output Subtracts 4-digit (single-word) hexadecimal data and/or constants −C(412) SUBTRACT Required with the Carry Flag (CY). WITH CARRY (Signed binary) –C @–C (Signed binary) − Mi: Minuend word CY will turn ON Su: Subtrahend...
Page 136 Section 3-9 Symbol Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE BCD Output Subtracts 8-digit (double-word) BCD data and/or constants with the −BCL(417) SUBTRACT Required Carry Flag (CY). WITH CARRY (BCD) –BCL Mi +1 @–BCL (BCD) Su+1 −...
Page 137 Section 3-9 Symbol Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BCD MULTIPLY Output Multiplies 4-digit (single-word) BCD data and/or constants. *B(424) Required (BCD) × (BCD) Md: Multiplicand (BCD) R +1 word Mr: Multiplier word R: Result word DOUBLE BCD Output Multiplies 8-digit (double-word) BCD data and/or constants.
Page 138: Conversion Instructions
Section 3-10 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE Output Divides 8-digit (double-word) unsigned hexadecimal data and/or /UL(433) UNSIGNED Required constants. BINARY DIVIDE (Unsigned binary) Dd + 1 @/UL ÷ (Unsigned binary) Dr + 1 Dd: 1st dividend word Dr: 1st divisor R + 3...
Page 139 Section 3-10 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BINARY-TO-BCD Output Converts a word of binary data to a word of BCD data. BCD(024) Required @BCD (BIN) (BCD) S: Source word R: Result word DOUBLE Output Converts 8-digit hexadecimal (32-bit binary) data to 8-digit BCD data. BCDL(059) BINARY-TO- Required...
Page 140 Section 3-10 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DATA DECODER Output Reads the numerical value in the specified digit (or byte) in the source MLPX(076) MLPX Required word, turns ON the corresponding bit in the result word (or 16-word @MLPX range), and turns OFF all other bits in the result word (or 16-word range).
Page 141 Section 3-10 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DATA ENCODER Output FInds the location of the first or last ON bit within the source word (or DMPX(077) DMPX 16-word range), and writes that value to the specified digit (or byte) in Required @DMPX the result word.
Page 142 Section 3-10 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ASCII TO HEX Output Converts up to 4 bytes of ASCII data in the source word to their HEX(162) Required hexadecimal equivalents and writes these digits in the specified @HEX destination word.
Page 143 Section 3-10 Conversion Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SIGNED BCD- Output Converts one word of signed BCD data to one word of signed binary BINS(470) TO-BINARY Required data. BINS @BINS Signed BCD format specified in C Signed BCD Signed binary C: Control word...
Page 144: Logic Instructions
Section 3-11 Logic Instructions 3-11 Logic Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code LOGICAL AND Output Takes the logical AND of corresponding bits in single words of word ANDW(034) ANDW Required data and/or constants. @ANDW →R : Input 1 : Input 2 R: Result word DOUBLE...
Page 145 Section 3-11 Logic Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE EXCLU- Output Takes the logical exclusive OR of corresponding bits in double words XORL(612) SIVE OR Required of word data and/or constants. XORL @XORL +1) → (R, R+1) +1).
Page 146: Special Math Instructions
Section 3-12 Special Math Instructions 3-12 Special Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BINARY ROOT Output Computes the square root of the 32-bit binary content of the specified ROTB(620) ROTB words and outputs the integer portion of the result to the specified Required @ROTB result word.
Page 147: Floating-Point Math Instructions
Section 3-13 Floating-point Math Instructions 3-13 Floating-point Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FLOATING TO Output Converts a 32-bit floating-point value to 16-bit signed binary data and FIX(450) 16-BIT Required places the result in the specified result word. @FIX Floating-point data (32 bits)
Page 148 Section 3-13 Floating-point Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FLOATING- Output *F(456) Multiplies two 32-bit floating-point numbers and places the result in POINT MULTIPLY Required the specified result words. Multiplicand (floating- Md+1 point data, 32 bits) ×...
Page 149 Section 3-13 Floating-point Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code TANGENT Output Calculates the tangent of a 32-bit floating-point number (in radians) TAN(462) Required and places the result in the specified result words. @TAN Source (32-bit floating-point data) S: 1st source word...
Page 150 Section 3-13 Floating-point Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code EXPONENT Output Calculates the natural (base e) exponential of a 32-bit floating-point EXP(467) Required number and places the result in the specified result words. @EXP Source (32-bit floating-point data) S: 1st source...
Page 151: Double-Precision Floating-Point Instructions
Section 3-14 Double-precision Floating-point Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FLOATING- Converts the specified single-precision floating-point data (32-bit deci- Output required FSTR(448) POINT TO ASCII mal-point or exponential format) to text string data (ASCII) and outputs (CS1-H, CJ1-H, the result to the destination word.
Page 152 Section 3-14 Double-precision Floating-point Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code 32-BIT BINARY Converts the specified 32-bit signed binary data to double-precision float- Output DBLL(844) TO DOUBLE ing-point data (64 bits) and outputs the result to the destination words. Required FLOATING DBLL...
Page 153 Section 3-14 Double-precision Floating-point Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE Converts the specified double-precision floating-point data (64 bits) from Output RADD(849) DEGREES TO degrees to radians and outputs the result to the result words. Required RADIANS RADD @RADD S: 1st source...
Page 154 Section 3-14 Double-precision Floating-point Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE ARC Calculates the angle (in radians) from the tangent value in the specified Output ATAND(856) TANGENT double-precision floating-point data (64 bits) and outputs the result to the Required result words.
Page 155: Table Data Processing Instructions
Section 3-15 Table Data Processing Instructions 3-15 Table Data Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SET STACK Output Defines a stack of the specified length beginning at the specified word SSET(630) SSET Required and initializes the words in the data region to all zeroes. @SSET Internal I/O memory address...
Page 156 Section 3-15 Table Data Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DIMENSION Output Defines a record table by declaring the length of each record and the RECORD TABLE DIM(631) Required number of records. Up to 16 record tables can be defined. @DIM Table number (N) Record 1...
Page 157 Section 3-15 Table Data Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SWAP BYTES Output Switches the leftmost and rightmost bytes in all of the words in the SWAP(637) SWAP Required range. Byte position is swapped. @SWAP N: Number of words R1: 1st word in range...
Page 158 Section 3-15 Table Data Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code STACK SIZE Counts the amount of stack data (number of words) in the specified stack. Output required SNUM(638) READ (CS1-H, CJ1-H, CJ1M, or CS1D only) SNUM @SNUM TB: First stack address...
Page 159: Data Control Instructions
Section 3-16 Data Control Instructions 3-16 Data Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code PID CONTROL Output Executes PID control according to the specified parameters. PID(190) Required Parameters (C to C+8) PV input (S) PID control S: Input word C: 1st parameter word Manipulated variable (D)
Page 160 Section 3-16 Data Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DEAD ZONE Output Adds the specified bias to input data and outputs the result. ZONE(682) CONTROL Required Output ZONE @ZONE Positive bias (C+1) S: Input word Input C: 1st limit word D: Output word Negative bias (C)
Page 161 Section 3-16 Data Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SCALING 2 Output Converts signed binary data into signed BCD data according to the SCL2(486) SCL2 Required specified linear function. An offset can be input in defining the linear @SCL2 function.
Page 162 Section 3-16 Data Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SCALING 3 Output Converts signed BCD data into signed binary data according to the SCL3(487) SCL3 Required specified linear function. An offset can be input in defining the linear @SCL3 function.
Page 163: Subroutine Instructions
Section 3-17 Subroutine Instructions 3-17 Subroutine Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SUBROUTINE Output Calls the subroutine with the specified subroutine number and SBS(091) CALL Required executes that program. Execution condition ON @SBS N: Subroutine number Main program Subroutine program (SBN(092) to...
Page 164: Interrupt Control Instructions
Section 3-18 Interrupt Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code GLOBAL SUB- Calls the subroutine with the specified subroutine number and exe- Output GSBS(750) ROUTINE CALL cutes that program. Not required (CS1-H, CJ1-H, CJ1M, or CS1D only) N: Subroutine GSBS number...
Page 165 Section 3-18 Interrupt Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code CLEAR Output Clears or retains recorded interrupt inputs for I/O interrupts CLI(691) INTERRUPT Required or sets the time to the first scheduled interrupt for scheduled (Not supported interrupts.
Page 166: High-Speed Counter And Pulse Output Instructions (Cj1M-Cpu21/22/23 Only)
Section 3-19 High-speed Counter and Pulse Output Instructions (CJ1M-CPU21/22/23 Only) 3-19 High-speed Counter and Pulse Output Instructions (CJ1M- CPU21/22/23 Only) Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MODE CONTROL INI(880) is used to start and stop target value comparison, to Output change the present value (PV) of a high-speed counter, to Required...
Page 167 Section 3-19 High-speed Counter and Pulse Output Instructions (CJ1M-CPU21/22/23 Only) Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SET PULSES PULS(886) is used to set the number of pulses for pulse output. Output PULS PULS Required @PULS P: Port specifier T: Pulse type N: Number of pulses...
Page 168: Step Instructions
Section 3-20 Step Instructions 3-20 Step Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code STEP DEFINE STEP(008) functions in following 2 ways, depending on its position and Output whether or not a control bit has been specified. STEP(008) STEP Required (1)Starts a specific step.
Page 169 Section 3-21 Basic I/O Unit Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DIGITAL SWITCH Reads the value set on an external digital switch (or thumbwheel switch) Output DSW (210) INPUT connected to an Input Unit or Output Unit and stores the 4-digit or 8-digit Required BCD data in the specified words.
Page 170 Section 3-21 Basic I/O Unit Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code 7-SEGMENT DIS- Converts the source data (either 4-digit or 8-digit BCD) to 7-segment Output PLAY OUTPUT 7SEG (214) display data, and outputs that data to the specified output word. Required 7SEG (CS/CJ-series...
Page 171: Serial Communications Instructions
Section 3-22 Serial Communications Instructions 3-22 Serial Communications Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code PROTOCOL Output Calls and executes a communications sequence registered in a Serial MACRO PMCR(260) Required Communications Board (CS Series only) or Serial Communications PMCR Unit.
Page 172: Network Instructions
Section 3-23 Network Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code RECEIVE VIA Reads the specified number of bytes of data starting with the specified RXDU(255) SERIAL COMMU- first word from the serial port of a Serial Communications Unit with unit NICATIONS UNIT version 1.2 or later.
Page 173 Section 3-23 Network Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DELIVER Output Sends FINS commands and receives the response CMND(490) COMMAND Required CMND Local node Destination node @CMND Com- Command mand data (n S: 1st command Interpret word (S−1) bytes) D: 1st response...
Page 174 Section 3-23 Network Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code EXPLICIT WORD Reads data to the local CPU Unit from a remote CPU Unit in the net- Output ECHRD (723) READ work. (The remote CPU Unit must support explicit messages.) Required ECHRD (CS/CJ-series...
Page 175: File Memory Instructions
Section 3-24 File Memory Instructions 3-24 File Memory Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code READ DATA FILE Output Reads the specified data or amount of data from the specified data file FREAD(700) FREAD Required in file memory to the specified data area in the CPU Unit. @FREAD Starting read ad- dressspecified in...
Page 176: Display Instructions
Section 3-25 Display Instructions 3-25 Display Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DISPLAY Reads the specified sixteen words of extended ASCII and displays the Output MSG(046) MESSAGE message on a Peripheral Device such as a Programming Console. Required @MSG N: Message...
Page 177: Debugging Instructions
Section 3-27 Debugging Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code HOURS TO Output Converts time data in hours/minutes/seconds format to an equivalent SEC(065) SECONDS Required time in seconds only. @SEC Minutes Seconds S: 1st source Hours word D: 1st destination word Seconds SECONDS TO...
Page 178: Failure Diagnosis Instructions
Section 3-28 Failure Diagnosis Instructions 3-28 Failure Diagnosis Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FAILURE ALARM Output Generates or clears user-defined non-fatal errors. Non-fatal errors FAL(006) do not stop PC operation. Required Also generates non-fatal errors with the system. @FAL FAL Error Flag ON Execution of...
Page 179: Other Instructions
Section 3-29 Other Instructions 3-29 Other Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SET CARRY Sets the Carry Flag (CY). Output STC(040) Required @STC CLEAR CARRY Turns OFF the Carry Flag (CY). Output CLC(041) Required @CLC SELECT EM Changes the current EM bank.
Page 180: Block Programming Instructions
Section 3-30 Block Programming Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DISABLE Disables peripheral servicing during program execution in one of the Output IOSP(287) PERIPHERAL Parallel Processing Modes or Peripheral Servicing Priority Mode. Required SERVICING (CS1D CPU Units for Single-CPU Systems, CS1-H, CJ1-H, or CJ1M...
Page 181 Section 3-30 Block Programming Instructions Instruction Symbol/Operand FunctionS Location Mnemonic Execution condition Code BLOCK Block program Pause and restart the specified block program from another block BPRS PROGRAM Required (812) program. RESTART BPRS N: Block program number BPRS(812) executed for block program n. Block program n.
Page 182 Section 3-30 Block Programming Instructions Instruction Symbol/Operand FunctionS Location Mnemonic Execution condition Code CONDITIONAL IF (802) Block program If the execution condition is ON, the instructions between IF(802) and BLOCK Required ELSE(803) will be executed and if the execution condition is OFF, the BRANCHING instructions between ELSE(803) and IEND(804) will be executed.
Page 183 Section 3-30 Block Programming Instructions Instruction Symbol/Operand FunctionS Location Mnemonic Execution condition Code ONE CYCLE AND WAIT(805) Block program If the execution condition is ON for WAIT(805), the rest of the WAIT Required instruction in the block program will be skipped. WAIT Execution Execution...
Page 184 Section 3-30 Block Programming Instructions Instruction Symbol/Operand FunctionS Location Mnemonic Execution condition Code COUNTER WAIT CNTW(814) Block program Delays execution of the rest of the block program until the specified count CNTW Required has been achieved. Execution will be continued from the next instruction after CNTW(814)/CNTWX(817) when the counter counts out.
Page 185 Section 3-30 Block Programming Instructions Instruction Symbol/Operand FunctionS Location Mnemonic Execution condition Code LOOP Block program LOOP(809) designates the beginning of the loop program. LOOP Required Execution Execution Execution Executio condition condition condition condition Execution condition Loop repeated LEND LEND (810) LEND(810) or LEND(810) NOT specifies the end of the loop.
Page 186: Text String Processing Instructions
Section 3-31 Text String Processing Instructions 3-31 Text String Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MOV STRING Output Transfers a text string. MOV$(664) MOV$ Required @MOV$ S: 1st source word D: 1st destination word CONCATENATE Output Links one text string to another text string.
Page 187 Section 3-31 Text String Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FIND IN STRING Output Finds a designated text string from within a text string. FIND$(660) FIND Required Found data @FIND$ → → → S1: Source text string first word S2: Found text string first word...
Page 188 Section 3-31 Text String Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code EXCHANGE Output Replaces a designated text string with another designated text string. XCHG$(665) STRING Required XCHG$ @XCHG$ Ex1: 1st exchange word 1 Ex2: 1st exchange word 2 CLEAR STRING Output Clears an entire text string with NUL (00 hex).
Page 189: Task Control Instructions
Section 3-32 Task Control Instructions 3-32 Task Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code TASK ON Output Makes the specified task executable. TKON(820) TKON Required @TKON The specified task's task The specified task's task number is number is higher than the local lower than the local task's task N: Task number task's task number (m<n).
Page 190: Model Conversion Instructions (Cpu Unit Ver. 3.0 Or Later Only)
Section 3-33 Model Conversion Instructions (CPU Unit Ver. 3.0 or Later Only) 3-33 Model Conversion Instructions (CPU Unit Ver. 3.0 or Later Only) Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BLOCK Output Transfers the specified number of consecutive words. TRANSFER XFERC(565) Required...
Page 191: Special Function Block Instructions
Section 3-34 Special Function Block Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MOVE BIT Output Transfers the specified bit. MOVBC(568) MOVBC Required @MOVBC S: Source word or data C: Control word (BCD) D: Destination word BIT COUNTER Output Counts the total number of ON bits in the specified word(s).
Page 192 Section 3-34 Special Function Block Instructions...
Page 193: Tasks
SECTION 4 Tasks This section describes the operation of tasks. Task Features..........4-1-1 Overview.
Page 194: Task Features
Task Features Section 4-1 Task Features 4-1-1 Overview CS/CJ-series control operations can be divided by functions, controlled devices, processes, developers, or any other criteria and each operation can be programmed in a separate unit called a “task.” Using tasks provides the fol- lowing advantages: 1,2,3...
Page 195: Tasks And Programs
Task Features Section 4-1 6. Easily understood user programs. Programs are structured in blocks that make the programs much simpler to understand for sections that would conventionally be handled with in- structions like jump. Task C Task A Start task A (Program A) Start task B Task B...
Page 196: Basic Cpu Unit Operation
Task Features Section 4-1 4-1-3 Basic CPU Unit Operation The CPU Unit will execute cyclic tasks (including extra cyclic tasks, CS1-H, CJ1-H, CJ1M, or CS1D CPU Unit only) starting at the lowest number. It will also interrupt cyclic task execution to execute an interrupt task if an interrupt occurs.
Page 197 Task Features Section 4-1 starting at the lowest task number after execution of the normal cyclic task (celiac task numbers 0 to 31) has been completed. Cyclic task 0 Executed in order starting at lowest number of the cyclic tasks. Normal cyclic tasks Cyclic task n Extra cyclic task 0...
Page 198: Types Of Tasks
Task Features Section 4-1 4-1-4 Types of Tasks Tasks are broadly classified as either cyclic tasks or interrupt tasks. Interrupt tasks are further divided into power OFF, scheduled, I/O (CS Series only), and external interrupt tasks (CS Series only). Interrupt tasks can also be executed as extra cyclic tasks.
Page 199 Task Features Section 4-1 CPU Unit (slots 0 to 4). For CJ1M CPU Units, the Unit must be connected as one of the three Units next to the CPU Unit (slots 0 to 2). I/O Interrupt Units mounted elsewhere cannot be used to request execution of I/O interrupt tasks.
Page 200: Task Execution Conditions And Settings
Task Features Section 4-1 Item Extra cyclic tasks Normal cyclic tasks Initial Task Execution Not supported. Supported. Flag (A20015) and Task Start Flag (A20014) Index (IR) and data Not defined when task is Undefined at the beginning (DR) register values started (same as normal of operation.
Page 201: Cyclic Task Status
Task Features Section 4-1 next to the CPU Unit (slots 0 to 4). For CJ1M CPU Units, the Unit must be connected as one of the three Units next to the CPU Unit (slots 0 to 2). Units mounted elsewhere cannot be used to generate external interrupts. 3.
Page 202: Status Transitions
Task Features Section 4-1 Note With CX-Programmer version 4.0 or higher, the task programs for CS/CJ- series PLCs can be monitored online to see if they are executing or stopped. The status indications on the CX-Programmer are as follows: • Running: The task is in READY or RUN status. (There is no way to tell the difference between these.) •...
Page 203: Using Tasks
Using Tasks Section 4-2 the time can be made into tasks and assigned Standby status to reduce cycle time. Reduced cycle time Conventional program Task Executes under All instructions will set conditions be executed un- less jumps or other functions are used. Executes under set conditions Note Standby status simply means that a task will be skipped during task execu-...
Page 204 Using Tasks Section 4-2 Example: Cyclic Task Cyclic task 0 (READY status at the start of operation) Cyclic task 1 Cyclic task 2 Cyclic task 3 1) Task 0 will be 2) Task 1 will go to in READY 3) Task 0 will go to READY status if A is Cyclic task 0 Cyclic task 0...
Page 205 Using Tasks Section 4-2 Cyclic task 1 Cyclic task 1 Standby status Standby status TKON (820) TKOF(821) Cyclic task 2 RUN status Cyclic task 2 RUN status If a TKOF(821) instruction is executed for the task it is in, the task will stop being executed where the instruction is executed, and the task will shift to Standby status.
Page 206: Task Instruction Limitations
Using Tasks Section 4-2 • Other words and bits in I/O Memory are shared by all tasks. CIO 001000 for example is the same bit for both cyclic task 1 and cyclic task 2. There- fore, be very careful in programming any time I/O memory areas other than the IR and DR Areas are used because values changed with one task will be used by other tasks.
Page 207: Flags Related To Tasks
Section 4-2 Using Tasks Mnemonic Instruction FOR/NEXT FOR/NEXT IL/ILC INTERLOCK/INTERLOCK CLEAR SBS/SBN/RET SUBROUTINE CALL/SUBROUTINE ENTRY/SUBROUTINE RETURN MCRO/SBN/RET MACRO/SUBROUTINE ENTRY/SUBROUTINE RETURN BPRG/BEND BLOCK PROGRAM BEGIN/BLOCK PROGRAM END STEP S/STEP STEP DEFINE Instructions Not Allowed in Interrupt Tasks The following instructions cannot be placed in interrupt tasks. Any attempt to execute one of these instructions in an interrupt task will cause the ER Flag to turn ON and the instruction will not be executed.The following instructions can be used if an interrupt task is being used as an extra task.
Page 208 Section 4-2 Using Tasks Note Task Flags are used only with cyclic tasks and not with interrupt tasks. With an interrupt task, A44115 will turn ON if an interrupt task executes after the start of operation, and the number of the interrupt task that required for maxi- mum processing time will be stored in two-digit hexadecimal in A44100 to A44107.
Page 209 Using Tasks Section 4-2 Task Start Flag A20014 Initialization processing Flags Related to All Tasks Task Error Flag (A29512) The Task Error Flag will turn ON if one of the following task errors occurs. • No cyclic tasks (including extra cyclic tasks) are READY during a cycle. •...
Page 210 Section 4-2 Using Tasks From Program Mode to Operating or Monitor Mode. Cyclic task 0 with the startup at the start of operation attribute (overall control task) Cyclic task 1 Cyclic task 2 Cyclic task 3 Tasks Separated by Function Tasks Separated by Controlled Section A-section control Conveyor task...
Page 211: Designing Tasks
Using Tasks Section 4-2 4-2-4 Designing Tasks We recommend the following guidelines for designing tasks. 1,2,3... 1. Use the following standards to study separating tasks. a) Summarize specific conditions for execution and non-execution. b) Summarize the presence or absence of external I/O. c) Summarize functions.
Page 212: Global Subroutines
Using Tasks Section 4-2 8. Assign I/O memory into memory shared by tasks and memory used only for individual tasks, and then group I/O memory used only for individual tasks by task. Relationship of Tasks to Up to 128 block programs can be created in the tasks. This is the total number Block Programs for all tasks.
Page 213: Interrupt Tasks
Section 4-3 Interrupt Tasks Cyclic task (including extra cyclic task) Interrupt task 0 GSBS Call GSBN n = 0 to 1,023 Global subroutine Exe- (shared subroutine cution used for standard programming_ Return GRET Cyclic task (including Multiple tasks extra cyclic task) Call GSBS Return...
Page 214 Interrupt Tasks Section 4-3 Note The execution time for the power OFF task must be less than 10 ms – (Power OFF delay detection time). CPU Unit Interrupt Pro- Power OFF gram External Interrupts (CS An external interrupt task will be executed when an interrupt is requested by Series Only) an Special I/O Unit, CPU Bus Unit, or Inner Board (CS Series only).
Page 215 Interrupt Tasks Section 4-3 next to the CPU Unit (slots 0 to 4). For CJ1M CPU Units, the Unit must be connected as one of the three Units next to the CPU Unit (slots 0 to 2). Units mounted elsewhere cannot be used to generate external interrupts. 3.
Page 216 Interrupt Tasks Section 4-3 Interrupt Input Unit Numbers, Input Interrupt Input Unit No. Input No. I/O interrupt task Numbers, and I/O (See note.) Interrupt Task Numbers 0 to 15 100 to 115 0 to 15 116 to 131 Note For CS-series PLCs, Interrupt Input Unit numbers are in order from 0 to 1 starting on the left side of the CPU Rack.
Page 217 Interrupt Tasks Section 4-3 Example: The following examples shows executed scheduled interrupt task 2 every second. Interrupt number 4 will be executed Cyclic task at an interrupt interval of 0064 Hex. &100 Scheduled interrupt time unit in PLC Setup = 10 ms (0.01 s) Every second Interrupt Cyclic task...
Page 218 Interrupt Tasks Section 4-3 Example: If the power OFF detection delay time is set to 4 ms in PLC Setup, then execution time must be less than 10 minus 4 ms, or 6 ms. Power OFF interrupt task Less than 10 ms minus the power OFF detection delay time The default setting is 10 ms max.
Page 219 Interrupt Tasks Section 4-3 Power OFF Interrupt Task Execution Cyclic task Cyclic task Power Power OFF interrupt task 1 Power OFF interrupt task ON/OFF setting in PC Setup: ON CPU reset PLC Setup Settings for Power OFF Interrupt Task (Task Number: 1) Address Name Description...
Page 220: Interrupt Task Priority
Interrupt Tasks Section 4-3 number), the Board will request execution of an external interrupt task in the CPU Unit after it receives data from its serial port and writes that data into the CPU Unit’s I/O memory. Specifies exter- CPU Unit Serial Communications Board nal interrupt task number and re-...
Page 221: Interrupt Task Flags And Words
Interrupt Tasks Section 4-3 Interrupt during Interrupt Task Execution If an interrupt occurs while another interrupt task is being executed, the task for the interrupt will not be executed until the original interrupt finishes execut- ing. Cyclic task Interrupt task A Interrupt during Interrupt task B execution...
Page 222: Application Precautions
Interrupt Tasks Section 4-3 Interrupt Task with Maximum Processing Time (A441) The interrupt task number with maximum processing time is stored in binary data. Here, 8000 to 80FF Hex correspond to task numbers 00 to FF Hex. A44115 will turn ON when the first interrupt occurs after the start of operation. The maximum processing time for subsequent interrupt tasks will be stored in the rightmost two digits in hexadecimal and will be cleared at the start of oper- ation.
Page 223 Interrupt Tasks Section 4-3 offending interrupt task number will be stored in A426 (Interrupt Task Error, Task Number). The CPU Unit however will continue to operate. C200H Special I/O Unit Incorrect Use Correct Use Interrupt task Interrupt task Up to 10 ms Master SYSMAC 10 ms or BUS Remote I/O Unit...
Page 224 Interrupt Tasks Section 4-3 Related Auxiliary Area Flags/Words Name Address Description Interrupt Task Error A40213 Turns ON if an interrupt task executes for more than 10 ms during Flag C200H Special I/O Unit or SYSMAC BUS Remote I/O refresh, but the CPU Unit will continue running.
Page 225: Programming Device Operations For Tasks
Programming Device Operations for Tasks Section 4-4 instructions will not be interrupted for execution of interrupt task, i.e., execu- tion of the instruction will be completed before the interrupt task is executed, delaying the response of the interrupt. To prevent this, separate data process- ing for these instructions into more than one instructions, as shown below for XFER.
Page 226 Programming Device Operations for Tasks Section 4-4 Programming Console A task is handled as the entire program on the Programming Console. Access and edit a program with a Programming Console by specifying CT00 to CT31 for a cyclic task or IT001 to IT255 for an interrupt task. 0: Cyclic task, 1: Interrupt task Cyclic task No.? Interrupt task No.?
Page 227: File Memory Functions
SECTION 5 File Memory Functions This section describes the functions used to manipulate file memory. File Memory ..........5-1-1 Types of File Memory.
Page 228: File Memory
File Memory Section 5-1 File Memory The CS/CJ Series support file memory. The following media can be used as memory for storing files. 1,2,3... 1. Memory Cards 2. A specified range in the EM Area called EM file memory Note CJ1M CPU Units do not have an EM Area, so EM file memory can- not be used.
Page 229: Types Of File Memory
File Memory Section 5-1 5-1-1 Types of File Memory Category Type Capacity Model File data recognized by Allowed file the CPU Unit operations Flash 15 Mbytes HMC-EF172 All are possible. Entire user program Memory Cards memory (See page 207 30 Mbytes HMC-EF372 Specified range in I/O for details.)
Page 230 File Memory Section 5-1 Format Memory Cards are formatted before shipping. There is no need to format them after purchase. To format them once they have been used, always do so in the CPU Unit using the CX-Programmer or a Programming Console. If a Memory Card is formatted directly in a notebook computer or other com- puter, the CPU Unit may not recognize the Memory Card.
Page 231: File Data
File Memory Section 5-1 4. A few seconds will be required for the CPU Unit to recognize the Memory Card after it is inserted. When accessing a Memory Card immediately after turning ON the power supply or inserting the Memory Card, program an NC condition for the Memory Card Recognized Flag (A34315) as an input condition, as shown below.
Page 232: Files
File Memory Section 5-1 Files That Can Be Written Files That Can Be Written from the CPU Unit from the CX-Programmer CX-Programmer CPU Unit Data transfer operations from the CX-Programmer Program files User program Symbol files Data files Comment files I/O memory Memory Program index files...
Page 233 File Memory Section 5-1 File Types, Names, and Extensions There are 4 types of files that can be managed (read and written) by the CPU Unit. • General-purpose Files These files can be accessed (read or written) with Programming Devices, FINS commands, instructions, or Auxiliary Area control bit operations.
Page 234 File Memory Section 5-1 Transferring with a Parameter Area File Type Extension Description Explanation File Name Program AUTOEXEC .OBJ Entire user program • The file does not have to be on the Required File Memory Card even when automatic transfer at startup is specified. •...
Page 235 File Memory Section 5-1 Transferring without a Parameter Area File Type Extension Description Explanation File Name Program REPLACE .OBJ Entire user program • The contents is the same as that of Required File AUTOEXEC.OBJ. Note: • This file will be transferred at startup CS/CJ- even if there is not a parameter area series CPU...
Page 236 File Memory Section 5-1 Backup Files (Not The files in the following table are created automatically when data is trans- Supported by CS-series ferred to and from the Memory Card during backup operation. CS1 CPU Units That Are Pre-EV1) Type Extension Description Explanation...
Page 237 File Memory Section 5-1 Note 1. The following backup files can be created only when using CS/CJ-series CPU Units with unit version 3.0 or later. Symbol table files, comment files, and program index files These files are automatically created from the files in either the Memory Card, EM file memory, or comment memory.
Page 238 File Memory Section 5-1 File Sizes The size of files in bytes can be calculated with the equations in the following table. File type File size (Number of words × 2) + 48 bytes Data files (.IOM) Example: Entire DM Area (D00000 to D32767) (32,768 words ×...
Page 239 File Memory Section 5-1 Extension Data format Contents Words/field .TXT Non-delimited ASCII This format is created by converting one-word fields of I/O 1 word (See notes.) words format memory (4-digit hexadecimal) to ASCII and packing the fields without delimiters. Records can be delimited with car- riage returns.
Page 240 File Memory Section 5-1 f) Carriage Returns: Data is packed consecutively when carriage returns are not used. When carriage returns are used, a carriage return code is inserted after the specified number of fields. An offset from the beginning of the file (starting read word or starting write word) cannot be specified in the FREAD(700)/FWRIT(701) instructions if carriage returns are used in the file.
Page 241 File Memory Section 5-1 4 bytes I/O memory Converted to ASCII Delimiter 4 bytes The file displayed as text. Delimiter Contents of ABC.CSV CSV/TXT Data File The following illustration shows the data structure of a CSV data file Structure (Double Word) (ABC.CSV) with double-word fields containing four words from I/O memory: 1234 Hex, 5678 Hex, 9ABC Hex, and DEF0 Hex.
Page 242 File Memory Section 5-1 • Example 1: Inputting non-negative decimal values. Item Converting unsigned decimal to 4-digit Converting unsigned decimal to 8-digit hexadecimal hexadecimal Function DEC2HEX(cell_location,4) DEC2HEX(cell_location,8) used Example Input 10 in decimal and convert to 000A in 4-digit Input 10 in decimal and convert to 0000000A in hexadecimal.
Page 243: Description Of File Operating Procedures
File Memory Section 5-1 the CX-Programmer), the remaining data will be written to EM bank 0 if the DM Area is exceeded or the following EM bank if an EM bank is exceeded. 2. When using the CX-Programmer, you can specify a data file that will ex- ceed the maximum DM Area address D32767 or maximum EM Area ad- dress of E@_32767.
Page 244 File Memory Section 5-1 Operating procedure Medium File name Description Entire Data Parame- Symbol program Area ter Area tables, data data com- (See ment note 3.) files, pro- gram index files (See note 6.) Program- CX-Pro- Memory CX-Program- Read ming Device grammer Card mer system...
Page 245: Applications
File Memory Section 5-1 4. Version V1.2 and higher versions of the CX-Programmer can be used to transfer program files (.OBJ) between the computer’s RAM and a storage device. 5. With CS/CJ-series CPU Unit Ver. 2.0, files can be automatically transferred to the CPU Unit at startup without a parameter file stored in the Memory Card.
Page 246 File Memory Section 5-1 and edited with a spreadsheet program (Not supported by CS-series CS1 CPU Units that are pre-EV1). I/O memory data stored in TXT or CSV format Spreadsheet program Via Memory Card Adapter Memory Card Conversely, data such as Special I/O Unit settings can be created with a spreadsheet program in TXT or CSV format, stored on a Memory Card, and read to the CPU Unit by FREAD(700) (Not supported by CS-series CS1 CPU Units that are pre-EV1).
Page 247: Manipulating Files
Section 5-2 Manipulating Files Backup Files The backup function can be used to store all of the CPU Unit’s data (the entire I/O memory, program, and parameter area) on the Memory Card without a Programming Device. If a problem develops with the CPU Unit’s data, the backed-up data can be restored immediately.
Page 248 Section 5-2 Manipulating Files Operation CX-Programmer Programming Console Coping files Not possible Deleting/Creating subdirectories Not possible Note With CS/CJ-series CPU Unit Ver. 2.0 or later, password read protection can be used to prohibit writing a program file to file memory (i.e., a Memory Card or EM file memory).
Page 249 Manipulating Files Section 5-2 HMC-AP001 Memory Card Adapter Memory Card Computer's PC Card slot CX-Programmer Use the following procedure for file memory operations. 1,2,3... 1. Double-click the Memory Card icon in the Project Window with the CPU Unit online. The Memory Card Window will be displayed. 2.
Page 250 Section 5-2 Manipulating Files Item 1 Item 2 Item 3 Item 4 Item 5 2: Initialize Enter 9713 (Memory Card) or 8426 (EM file memory). 3: Delete Select OBJ, CIO, HR, WR, Media type, file name AR, DM, EM, or STD. Note The file types are shown in the following table.
Page 251: Fins Commands
Manipulating Files Section 5-2 Source CPU Unit Original I/O Destination CPU Unit allocation status Unit version of CPU Unit to which files for automatic transfer at startup will be sent Pre-Ver. 2.0 Unit Ver. 2.0 Unit Ver. 3.0 or later CPU Unit’s unit Pre-Ver.
Page 252: Fread(700), Fwrit(701), And Cmnd(490
Manipulating Files Section 5-2 Note A computer on an Ethernet Network can read and write file memory (Memory Cards or EM file memory) on a CPU Unit through an Ethernet Unit. Data in files can be exchanged if the host computer functions as an FTP client and the CS/CJ-series PLC functions as an FTP server.
Page 253 Section 5-2 Manipulating Files The CMND(490) (DELIVER COMMAND) instruction can be executed to issue a FINS command to the CPU Unit itself to perform file operations. File opera- tions such as file formatting, deletion, copying, and renaming can be per- formed on files in the Memory Card or EM file memory (Not supported by CS- series CS1 CPU Units that are pre-EV1).
Page 254 Manipulating Files Section 5-2 Transferring ASCII Files ASCII files can be transferred as well as binary files, so the third and fourth (Not supported by CS- digits of the instruction’s control word operand (C) indicate the type of data file series CS1 CPU Units that being transferred and the number of fields between carriage returns.
Page 255 Manipulating Files Section 5-2 2. Execution of CMND(490) to send a FINS command to the CPU Unit itself 3. Replacement of the entire program by Auxiliary Area control bit operations 4. Execution of a simple backup operation Use the File Memory Operation Flag (A34313) for exclusive control of file memory instructions to prevent them from being executed while another file memory operation is in progress.
Page 256 Manipulating Files Section 5-2 CMND(490): DELIVER COMMAND CMND(490) can be used to issue a FINS command to the local CPU Unit itself to perform file memory operations such as formatting or deleting files. Make the following settings in CMND(490)’s control words when issuing a file- memory FINS command to the local PLC: 1,2,3...
Page 257: Replacement Of The Entire Program During Operation
D00100 and D00101. (for port 7) In this case, the FINS command creates a subdi- rectory named "CS1" within the OMRON directory in the CPU Unit's Memory Card. The response is composed of the 2-byte command code (2215) and the 2-byte response code.
Page 258 Section 5-2 Manipulating Files recorded in advance and the specified program file must exist on the Memory Card in order to replace the program during operation. CPU Unit Replacement User program Memory Card Replacement Start Bit (A65015) turned from OFF to ON. Specifies Replacement Program program...
Page 259 Manipulating Files Section 5-2 Note 1. Turn ON the IOM Hold Bit (A50012) if you want to maintain the status of I/O memory data through the program replacement. Turn ON the Forced Status Hold Bit (A50013) if you want to maintain the status of force-set and force-reset bits through the program replacement.
Page 260 Section 5-2 Manipulating Files If data tracing is being performed, it will be stopped. Instruction conditions (interlocks, breaks, and block program execution) will be initialized. Differentiation Flags will be initialized whether the IOM Hold Bit is ON or OFF. Operations after The status of the cyclic tasks depends upon their operation-start properties.
Page 261 Manipulating Files Section 5-2 Name Address Operation Replacement Start Bit A65015 If this bit has been enabled by the setting the Program Password (A651) to (Not supported by CS-series A5A5 Hex, program replacement will start when this bit is turned from pre-EV1 CS1 CPU Units) OFF to ON.
Page 262 Manipulating Files Section 5-2 Start and execute another task to perform any processing required before pro- gram replacement or IOM Hold Bit processing. Main Task (Cyclic task number 0) First Cycle Flag ← Program version ← Version storage area Execution condition Replacement Start Bit...
Page 263: Automatic Transfer At Startup
Section 5-2 Manipulating Files Task protecting data during program replacement (Cyclic task number 31, standby status at startup) Processing to pro- tect data before pro- gram replacement Always ON Flag begins IOM Hold Bit Outputs to required loads during pro- gram replacement.
Page 264 Manipulating Files Section 5-2 Note This function cannot be used to read EM file memory. The program file name depends on whether a parameter area file is also going to be transferred. Transferring a Parameter Use the following file names. Area File Program file: AUTOEXEC.OBJ Parameter area file: AUTOEXEC.STD...
Page 265 Manipulating Files Section 5-2 4. If DIP switch pin 7 is turned ON and pin 8 is turned OFF to use the simple backup function, the simple backup function will take precedence even if pin 2 is also ON. In this case, the BACKUP@@ files will be transferred to the CPU Unit but the automatic transfer at startup files will not be trans- ferred.
Page 266 Manipulating Files Section 5-2 Note 1. If the program file name is REPLACE.OBJ (CS/CJ-series CPU Unit Ver. 2.0 or later only), the parameter area file will not be transferred even if it is on the Memory Card and regardless of the name of the parameter area file. 2.
Page 267 Manipulating Files Section 5-2 Supported File Transfer The following tables list whether files are automatically transferred to the CPU Combinations Unit at startup depending on which files are present on the Memory Card. ■ Program File: AUTOEXEC.OBJ Program file Parameter area Data files Transferred/ file...
Page 268 Manipulating Files Section 5-2 More Than One Type of Data File Program file Parameter area Data files Transferred/ Not file transferred AUTOEXEC.OBJ AUTOEXEC.STD One or more of the follow- One or more of the follow- The following data files are ing: AUTOEXEC.IOM, ing: REPLACE.IOM, transferred:...
Page 269 Manipulating Files Section 5-2 Related Auxiliary Bits/Words Name Address Setting Memory Error Flag A40115 ON when an error occurred in memory or there was an error in automatic (Fatal error) transfer from the Memory Card when the power was turned on (automatic transfer at start-up).
Page 270: Simple Backup Function
Manipulating Files Section 5-2 Precautions when Verification errors may occur at the Programming Console when comparing Comparing Automatic parameter data between files before transfer and the data after transfer when Transfer at Startup creating automatic transfer at startup parameter files (AUTOEXEC.STD) and executing automatic transfer at startup for combinations of pre-Ver.
Page 271 Manipulating Files Section 5-2 *1 This data is supported by CS/CJ-series CPU Units with unit version 3.0 or later only. The backup files are read to either the Memory Card, EM file memory, or comment memory. Note 1. The backup function will override the automatic transfer at startup function, so the backup files will be read to the CPU Unit when the PLC is turned ON even if pin 2 of the DIP switch is ON.
Page 272 Manipulating Files Section 5-2 The following table provides a summary of the simple backup operations. Backup operation Procedure status Pin 7 Backing up data from the CPU Unit to the Memory Press and hold the Memory Card Card Power Switch for three seconds. Backing up data to the Memory Card Memory Card Power Switch CPU Unit...
Page 273 Manipulating Files Section 5-2 Backup operation Procedure status Pin 7 Restoring data from the Memory Card to the CPU Turn the PLC OFF and ON again. Unit (See note 1.) Restoring data from the Memory Card CPU Unit Power ON Program Memory Card...
Page 274 Manipulating Files Section 5-2 Backup Files Data Files File name and Data area and range of Backup from Restore from Comparing Files required extension addresses stored CPU Unit to Memory Card Memory Card when Memory Card to CPU Unit to CPU Unit restoring data (creating files) CPU Unit...
Page 275 Manipulating Files Section 5-2 If the IOM Hold Bit (A50012) is ON and the PLC Setup is set to maintain the IOM Hold Bit Status at Startup when the backup files are written, the status of I/O memory data will be maintained when data is read from the Memory Card.
Page 276 Manipulating Files Section 5-2 Symbol Tables, Comment Files, Program Index Files (CS1-H/CJ1-H, CJ1M, CS1D CPU Units with Unit Version 3.0 or Later Only) File name and Contents Backup from Restore from Comparing Files required extension CPU Unit to Memory Card Memory Card when Memory Card...
Page 277 Section 5-2 Manipulating Files Backup operation Normal completion Error occurred (See note 1.) MCPWR status MCPWR status Error Lit → Remains lit while the Lit → Remains lit while the Comparing data between the The following comparison CPU Unit and the Memory Memory Card Power Switch Memory Card Power Switch errors can occur (See note...
Page 278 Section 5-2 Manipulating Files Related Auxiliary Bits/Words Name Address Description File Memory Operation Flag A34313 ON when any of the following are being performed. OFF when execution has been completed. • Memory Card detection • CMND instruction executed for local CPU Unit •...
Page 279 Manipulating Files Section 5-2 and Boards is written to the Memory Card. The data is backed up separately for each Unit and Board. Memory Card power supply switch DeviceNet Unit or other CS1-H, CJ1-H, CJ1M, or CS1D CPU Unit specific Unit/Board All data Simple backup...
Page 280 Section 5-2 Manipulating Files Unit/Board Model numbers Data backed up for Data capacity simple backup when used in Memory used with CS1-H/CJ1-H Card for simple CPU Unit backup Customizable CS1W-HIO01-V1 • User program 64 Kbytes Counter Units CS1W-HCP22-V1 • General-purpose read- CS1W-HCA22-V1 only DM CS1W-HCA12-V1...
Page 281 Manipulating Files Section 5-2 ■ Restoring Data 1,2,3... 1. Turn ON pin 7 on the CPU Unit’s DIP switch. 2. Turn ON the PLC. The backup files will be restored to the Units and Boards. The backup data for the Units and Boards will be restored from the Mem- ory Card to the Units and Boards.
Page 282 Manipulating Files Section 5-2 Additional Time when the CPU Bus Unit Settings File (BACKUP@@.PRM) on the Memory Card Is 128 Kbytes Operating Additional time Additional time Additional time mode when writing to a when verifying a when reading from a Memory Card Memory Card Memory Card...
Page 283: Using File Memory
Section 5-3 Using File Memory Precautions When When using a CJ-series CPU Unit with unit version 2.0 or earlier with a CJ- series CPU Unit with unit version 3.0, verification errors may occur when com- Mismatch Occurs During Backup Comparison paring parameter data with the backup data restored from the simple backup file that was created.
Page 284 Using File Memory Section 5-3 Initialize EM file memory. CX-Programmer Programming Console Initializing Individual EM A specified EM bank can be converted from ordinary EM to file memory. File Memory Note The maximum bank number for CJ-series CPU Units is 6. Bank 0 Bank 0 1.
Page 285: Operating Procedures
Using File Memory Section 5-3 Related Special Auxiliary Relay Name Address Description EM File Memory Starting Bank A344 The bank number that actually starts the EM file memory area at that time will be stored. The EM file from the starting bank number to the last bank will be converted to file memory.
Page 286 Using File Memory Section 5-3 Automatically Transferring Files at Startup Procedure when Transferring a Parameter Area File 1,2,3... 1. Insert an initialized Memory Card into the CPU Unit. Memory Card 2. Use a Programming Device to write the automatic transfer at startup files to the Memory Card.
Page 287 Using File Memory Section 5-3 Note A parameter area will not be transferred even if one is on the Memory Card. 3. Turn OFF the PLC power supply. 4. Turn ON DIP switch pin 2 (automatic transfer at startup). DIP switch pin 2 ON Note If pin 7 is ON and pin 8 is OFF, the backup function will be enabled and will override the automatic transfer at startup function.
Page 288 Using File Memory Section 5-3 Restoring Data from the Memory Card to the CPU Unit 1,2,3... 1. Insert the Memory Card containing the backup files into the CPU Unit. 2. Turn ON pin 7 and turn OFF pin 8 on the CPU Unit’s DIP switch. 3.
Page 289: Power Interruptions While Accessing File Memory
Using File Memory Section 5-3 3. Use a Programming Device to name the CPU Unit data (user program, I/O memory, parameter area), and then save the data to EM file memory. 4. Use a Programming Device to read the file in EM file memory to the CPU Unit.
Page 290 Using File Memory Section 5-3...
Page 291: Advanced Functions
SECTION 6 Advanced Functions This section provides details on the following advanced functions: cycle time/high-speed processing functions, index register functions, serial communications functions, startup and maintenance functions, diagnostic and debugging functions, Programming Device functions, and the Basic I/O Unit input response time settings. Cycle Time/High-speed Processing .
Page 292 6-6-4 Power OFF Detection Delay Setting ......6-6-5 Disabling Power OFF Interrupts ......6-6-6 Clock Functions.
Page 293: Cycle Time/High-Speed Processing
Cycle Time/High-speed Processing Section 6-1 Cycle Time/High-speed Processing The following functions are described in this section • Minimum cycle time function • Maximum cycle time function (watch cycle time) • Cycle time monitoring • Quick-response inputs • Interrupt functions • I/O refreshing methods •...
Page 294: Maximum Cycle Time (Watch Cycle Time)
Cycle Time/High-speed Processing Section 6-1 6-1-2 Maximum Cycle Time (Watch Cycle Time) If the cycle time (see note) exceeds the maximum cycle time setting, the Cycle Time Too Long Flag (A40108) will be turned ON and PLC operation will be stopped. Note Here, the cycle time would be the program execution time when us- ing a Parallel Processing Mode for CS1-H, CJ1-H, or CJ1M CPU Units, or CS1D CPU Units for Single-CPU Systems.
Page 295: High-Speed Inputs
Cycle Time/High-speed Processing Section 6-1 Reducing the Cycle Time The following methods are effective ways to reduce the cycle time in CS/CJ- series PLCs: 1,2,3... 1. Put tasks that aren’t being executed in standby. 2. Jump program sections that aren’t being executed with JMP(004) and JME(005).
Page 296: I/O Refreshing Methods
Cycle Time/High-speed Processing Section 6-1 Note The built-in interrupt inputs and high-speed counter inputs on a CJ1M CPU Unit can be used to activate interrupt tasks. Refer to the CJ Series Built-in I/O Operation Manual for details. 6-1-6 I/O Refreshing Methods There are three ways that the CS/CJ-series CPU Units can refresh data with Basic I/O Units and Special I/O Units: Cyclic refreshing, immediate refreshing, and execution of IORF(097).
Page 297: Disabling Special I/O Unit Cyclic Refreshing
Cycle Time/High-speed Processing Section 6-1 4. CS1D CPU Units for Duplex-CPU Systems do not support immediate re- freshing. 3. Execution of IORF(097) and DLNK(226) ■ IORF(097): I/O REFRESH IORF(097) can be used to refresh a range of I/O words upon execution of the instruction.
Page 298: Improving Refresh Response For Cpu Bus Unit Data
Cycle Time/High-speed Processing Section 6-1 Data is refreshed between this area and the CPU Unit each cycle during I/O refreshing, but this cyclic refreshing can be disabled for individual Units in the PLC Setup. There are basically three reasons to disable cyclic refreshing: 1,2,3...
Page 299 Cycle Time/High-speed Processing Section 6-1 Note 1. Longer cycle times (e.g., 100 ms) will increase the interval between when data links are refreshed. DLNK(226) can be used in this case, as shown in the following example. Cyclic task n Data links (Controller Link or DLNK SYSMAC Link) are refreshed here for the CPU Bus Unit with unit number N.
Page 300: Maximum Data Link I/O Response Time
Cycle Time/High-speed Processing Section 6-1 6-1-9 Maximum Data Link I/O Response Time Normal Processing The following diagram illustrates the data flow that will produce the maximum data link I/O response time when DLNK(226) is not used. Input Input Unit Basic I/O Units refreshed.
Page 301 Cycle Time/High-speed Processing Section 6-1 Using DLNK(226) The following diagram illustrates the data flow that will produce the maximum data link I/O response time when DLNK(226) is used. Input DLNK(226) execution Input Unit ▼ Basic I/O Units refreshed. Input ON delay CPU Bus Units refreshed (1) Delay of 1.5 cycle times (including data links)
Page 302: Background Execution
Cycle Time/High-speed Processing Section 6-1 The equation for maximum data link I/O response time is as follows: Input ON delay 1.5 ms Cycle time of PLC at CPU Unit #1 × 1.5 25 ms × 1.5 Faster by 12.5 ms (25 ms x 0.5) Communications cycle time ×...
Page 303 Cycle Time/High-speed Processing Section 6-1 Note One port is used for all background execution. Background execution for an instruction can thus not be started if background execution is already being performed for another instruction. Use the Communi- cations Port Enabled Flag to control instructions specified for back- ground execution so that no more than one instruction is executed at the same time.
Page 304 Cycle Time/High-speed Processing Section 6-1 ■ Outputting to Index Registers (IR) If MAX(182) or MIN(183) is executed to output the I/O memory map address of the word containing the minimum or maximum value to an index register, the address will not be output to the index register and will be output to A595 and A596 instead.
Page 305 Cycle Time/High-speed Processing Section 6-1 ON and A39510 will be turned ON instead. A39510 will remain ON until the next time an instruction is processed in the background. ■ Outputting to Data Registers (DR) for MAX(182) or MIN(183) If MAX(182) or MIN(183) is executed with a data register specified as the out- put word for the minimum or maximum value, an instruction execution error will occur and the ER Flag will turn ON.
Page 306 Cycle Time/High-speed Processing Section 6-1 Name Address Description Communica- A203 to These words contain the completion codes for the cor- tions Port A210 responding port numbers when network instructions Completion (SEND, RECV, CMND, or PMCR) have been executed. Codes The contents will be cleared when background execu- tion has been completed (for CS1D CPU Unit for Single- CPU System, or CS1-H, CJ1-H, or CJ1M CPU Unit).
Page 307 Section 6-1 Cycle Time/High-speed Processing Communications Port Enabled Flag Background instruction Instruction processing for user executed program Cycle time Cycle time Cycle time Background execution I/O refresh Programming Example 1 ■ Traditional Programming without Background Execution As shown below, processing is completed when the instruction is executed. Execution condition MAX(182) is executed completely as soon as the execution condition “a”...
Page 308 Section 6-1 Cycle Time/High-speed Processing Communications Execution Port Enabled Flag condition A20200 MAX(182) execution is started if execution D00000 condition “a” is ON and the Communications D00100 Port Enabled Flag is ON. D00200 Execution condition “b” is turned ON to enable the next background instructions (here, SUM(184)).
Page 309: Sharing Index And Data Registers Between Tasks
Cycle Time/High-speed Processing Section 6-1 Communications Execution Port Enabled Flag condition A20200 MAX(182) execution is started if execution condition “a” is ON and the Communications D00000 D00100 Port Enabled Flag is ON. The actual memory D00200 map address of the word containing the maximum value is output to A595 and A596.
Page 310: Index Registers
Section 6-2 Index Registers 2. Select Properties. The following dialog box will be displayed. 3. Leave the checkmark for using IR/DR independently per task if separate index and data registers are required for each task. Remove the check- mark to use shared index and data registers for all tasks. Auxiliary Area Flags and Words Name Address...
Page 311: Using Index Registers
Index Registers Section 6-2 Pointer All areas of I/O Memory MOVR(560) Index Register 6-2-2 Using Index Registers Index Registers can be a powerful tool when combined with loops such as FOR-NEXT loops. The contents of Index Registers can be incremented, dec- remented, and offset very easily, so a few instructions in a loop can process tables of consecutive data very efficiently.
Page 312 Index Registers Section 6-2 Example 1 The following example shows how an Index Register in a program loop can replace a long series of instructions. In this case, instruction A is repeated n+1 times to perform some operation such as reading and comparing a table of values.
Page 313 Section 6-2 Index Registers The 11-instruction subroutine on the left is equivalent to the 200-instruction subroutine on the right. W000 Puts the PLC memory MOVRW 0000 address of T0000's PV in T0000 D00100 IR0. T0000 Puts the PLC memory W000 address of T0000's T0000 Completion Flag in IR1.
Page 314: Processing Related To Index Registers
Index Registers Section 6-2 Direct Addressing of Index Registers Index Registers can be directly addressed only in the instructions shown in the following table. Instruction group Instruction name Mnemonic Primary function Data Movement Instruc- MOVE TO REGISTER MOVR(560) Stores the PLC memory address tions of a bit or word in an Index Regis- MOVE TIMER/COUNTER PV TO REG-...
Page 315 Index Registers Section 6-2 Processing Purpose Instructions Table Tables with one- Basic pro- Find values such as the checksum, a FCS(180), SRCH(181), MAX(182), process- word records cessing particular value, the maximum value, MIN(183), and SUM(184) or minimum value in the range. (Range instruc- tions) Special...
Page 316 Index Registers Section 6-2 LIFO (Last-in First-out) Processing The following diagram shows the operation of a last-in first-out (LIFO) stack. Pointer address Reads most recent word of data stored in the stack. Each time that a word is read, the pointer is decremented by one to indicate the next address for storage.
Page 317 Index Registers Section 6-2 Table Processing (Range Instructions) The range instructions act on a range of words, which can be considered a table of one-word records. These instructions perform basic operations such as finding the maximum value or minimum value in the range, search for a particular value in the range, or calculating the sum or FCS.
Page 318 Index Registers Section 6-2 record data, comparing record data, and performing calculations with record data. A typical application of record tables is storing manufacturing data for different models of a product (such as temperature and pressure settings) in record form and switching from model to model just by changing the record number. Model A ↓...
Page 319 Index Registers Section 6-2 0000 Defines record table 1 with 1,000 records of &5 5 words each. &1000 E0_00000 SETR Stores the PLC memory address of table number 1's first record (record 0) in IR0. &0 Jumps past the FOR-NEXT loop if the pro- cessing conditions haven't been set.
Page 320: Serial Communications
Protocol Connections Description Ports Peripheral RS-232C Host link 1) Various control commands such OMRON PT Host computer (Programmable as reading and writing I/O mem- Terminal) ory, changing the operating mode, and force-setting/reset- ting bits can be executed by issuing host link commands or FINS commands from the host computer to the CPU Unit.
Page 321 Section 6-3 Protocol Connections Description Ports Peripheral RS-232C Serial Gate- Converts received FINS com- OMRON components way (conver- mands into CompoWay/F com- (CompoWay/F-compatible devices) sion to mands and transfers them on the CompoWay/ serial communications path. NS-series PT F) (unit ver- sion 3.0 or...
Page 322: Host Link Communications
Serial Communications Section 6-3 6-3-1 Host Link Communications The following table shows the host link communication functions available in CS/CJ PLCs. Select the method that best suits your application. Command flow Command type Communications method Configuration Create frame in the host com- Host computer Host link command Directly connect the host computer in a 1:1...
Page 323 Serial Communications Section 6-3 2. The FINS command is transmitted from the PLC with a host link header and terminator attached. A program must be prepared in the host comput- er to analyze the FINS commands and return the proper responses. Procedure Programming Console Set the PLC Setup from a Pro-...
Page 324 Serial Communications Section 6-3 Header Name Function code EM AREA READ Reads the contents of the specified number of EM Area words, starting from the specified word. CIO AREA WRITE Writes the specified data (word units only) to the CIO Area, starting from the specified word.
Page 325 Serial Communications Section 6-3 Header Name Function code INITIALIZE (command only) Initializes the transmission control procedure of all PLCs connected to the host computer. Undefined command This response is returned if the header code of a command was not (response only) recognized.
Page 326 Serial Communications Section 6-3 Type Command Name Function code File Memory FILE NAME READ Reads the file memory’s file information. SINGLE FILE READ Reads the specified amount of data from the specified point in a file. SINGLE FILE WRITE Writes the specified amount of data from the specified point in a file.
Page 327: No-Protocol Communications
Serial Communications Section 6-3 6-3-2 No-protocol Communications The following table lists the no-protocol communication functions available in CS/CJ PLCs. Transfer direction Method Max. amount Frame format Other of data functions Start code End code Data transmission Execution of TXD(236) 256 bytes Yes: 00 to FF Yes: Send delay...
Page 328: Nt Link (1:N Mode)
Serial Communications Section 6-3 memory. Up to 256 bytes (including the start and end codes) can be trans- ferred in no-protocol mode. The following table shows the message formats that can be set for transmis- sions and receptions in no-protocol mode. The format is determined by the start code (ST) and end code (ED) settings in the PLC Setup.
Page 329: Cpu Unit's Serial Gateway
Serial Communications Section 6-3 PLC Setup Communications Programming Name Settings Default values Other conditions port Console setting contents address Peripheral port Serial communica- 02 Hex: NT Link 00 Hex: Host Link Turn ON pin 4 on tions mode (1:N mode) the CPU Unit DIP Bits: 8 to 11...
Page 330 Send delay None Converting FINS to CompoWay/F OMRON Components connected serially to the CPU Unit’s RS-232C port or peripheral port via CompoWay/F can be accessed from the PLC or PT using CompoWay/F commands enclosed in FINS messages. • Sent FINS message: FINS header + FINS command code 2803 hex + CompoWay/F command •...
Page 331 Serial Communications Section 6-3 CompoWay/F Slave-compatible Components Component Model series Temperature Con- Thermac NEO E5GN (G components) trollers E5CN E5EN E5AN Thermac R E5AR E5ER Plug-in Temperature Control- E5ZN lers Digital Controller Boards E5ZM Digital Controllers ES100X Timer/Counters Timers/Counters H8GN (G components) Digital Panel Meters Digital Panel Meters K3GN (G components)
Page 332 CompoWay/F command RS-485 (CompoWay/F) CompoWay/F-compatible OMRON component Note When the NS-series PT is connected serially to the PLC using serial communications mode (1:N NT Links), and the NS-series PT sends FINS commands encapsulated in NT Link commands using Smart Active Parts, the CPU Unit removes the NT Link header, etc.
Page 333 Access from CPU Unit (on the Same PLC) Serial conversion Details Routing tables to treat serial communications path as network OMRON components Optional CPU Unit with unit version 3.0 or later connected serially to CMND(490) RS-232C port the CPU Unit’s RS-...
Page 334 Serial Communications Section 6-3 Communications Frames Command Frame Frame before Conversion FINS header FINS command CompoWay/F Remote Remote Remote Etc. (See note.) network node unit address address address (DNA) (DA1) (DA2) Serial port 00 hex Serial Node No. Sub- Command Text (×...
Page 335: Serial Plc Links (Cj1M Cpu Units Only)
Serial Communications Section 6-3 Response Timeout Monitoring (Serial Gateway Mode) During Serial Gateway mode the time is monitored from when the message converted into the specified protocol by Serial Gateway is sent until a response is received from the remote device. (The default is 5 s. The setting range for a user-specified value is between 0.1 and 25.5 s.) If a response is not received at the serial port within the set time, a FINS error response is returned to the source of the FINS command (end code: 0205 hex...
Page 336 Serial Communications Section 6-3 System Configuration CPU Unit Polling Unit CPU Unit Polling Unit RS-422/485 CJ1W-CIF11 RS-422A Converter (See RS-232C note 1.) CPU Unit CPU Unit CPU Unit Unit No. 2 Polled Unit No. 0 Polled Unit No. 1 Polled Unit No. 3 NS-AL002 when using Number of Polled Units: 8 max.
Page 337 Serial Communications Section 6-3 accessed using common ladder programming. The areas allocated for the unit numbers of the PT or Polled Units not present in the network are unde- fined in the Polling Unit only. Example: Polling Unit link method, highest unit number: 3. In the following diagram, Polled Unit No.
Page 338 Serial Communications Section 6-3 Allocated Words Complete Link Method Address Link words 1 word 2 words 3 words 10 words CIO 3100 Polling Unit CIO 3100 CIO 3100 to CIO 3100 to CIO 3100 to CIO 3101 CIO 3102 CIO 3109 Polled Unit No.
Page 339 Serial Communications Section 6-3 Procedure The Serial PLC Links operate according to the following settings in the PLC Setup. Settings at the Polling Unit 1,2,3... 1. Set the serial communications mode of the RS-232C communications port to Serial PLC Links (Polling Unit). 2.
Page 340 Serial Communications Section 6-3 Related Auxiliary Area Flags Name Address Details Read/write Refresh timing RS-232C Port A39204 Turns ON when a com- Read • Cleared when power is turned ON. Communica- munications error occurs • Turns ON when a communications error tions Error Flag at the RS-232C port.
Page 341: Changing The Timer/Counter Pv Refresh Mode
Changing the Timer/Counter PV Refresh Mode Section 6-4 Changing the Timer/Counter PV Refresh Mode 6-4-1 Overview Previously, CS1 CPU Units used only BCD for the timer/counter PV refresh mode. Therefore, all timer/counter settings were input as BCD values. Other CPU Units (see notes 1 and 2) can use either BCD mode or binary mode to refresh the present values of timer and counter instructions (see note 3).
Page 342: Functional Specifications
Changing the Timer/Counter PV Refresh Mode Section 6-4 6-4-2 Functional Specifications Item Details Timer/counter PV refresh Must be set using CX-Programmer Ver.3.0 (not sup- mode setting method ported by CX-Programmer Ver 2.1 or lower). Set in the PLC properties of CX-Programmer Ver.3.0. Supported CPU Units CS1-H/CJ1-H CPU Units from Lot No.
Page 343: Bcd Mode/Binary Mode Selection And Confirmation
Changing the Timer/Counter PV Refresh Mode Section 6-4 6-4-3 BCD Mode/Binary Mode Selection and Confirmation When writing a new program, the BCD mode/binary mode is selected in the PLC property settings in CX-Programmer Ver 3.0. Note The BCD mode/binary mode selection is supported by CX-Programmer Ver 3.0 or higher only.
Page 344: Bcd Mode/Binary Mode Mnemonics And Data
Changing the Timer/Counter PV Refresh Mode Section 6-4 When the setting is changed, the following dialog box will be displayed au- tomatically. Cancel Click the OK Button to execute the program check. The program check results will be displayed in the output window. Example: The TIM instruction has been used even though the mode has been changed to binary mode.
Page 345: Restrictions
Changing the Timer/Counter PV Refresh Mode Section 6-4 BCD Mode/Binary Mode Data Display PLC propertY Meaning of input Setting range Example: Timer and display number: 0000, symbols Set value: 10 s BCD mode The # symbol indi- #0000 to #9999 cates the instruction value (a BCD value 0000...
Page 346: Instructions And Operands
Changing the Timer/Counter PV Refresh Mode Section 6-4 • The differences between the CX-Programmer and Programming Console operations when an incorrect timer/counter PV refresh mode instruction is input are as follows: • CX-Programmer: An error will occur if an instruction is input for a different mode than that set as the timer/counter PV refresh mode under PLC properties.
Page 347 Changing the Timer/Counter PV Refresh Mode Section 6-4 Instructions and Operands Timer and Counter Instructions TIMER (100 ms) Instruction name BCD mode Binary mode Mnemonic TIMX(550) S (timer set value) #0000 to #9999 (BCD) &0 to &65535 (decimal) or #0000 to #FFFF (hexa- decimal) Setting time (unit: 0.1 s) 0 to 999.9 s...
Page 348 Changing the Timer/Counter PV Refresh Mode Section 6-4 COUNTER Instruction name BCD mode Binary mode Mnemonic CNTX(546) S (counter set value) #0000 to #9999 (BCD) &0 to& 65535 (decimal) or #0000 to #FFFF (hexa- decimal) Setting 0 to 9,999 times 0 to 65,535 times REVERSIBLE COUNTER Instruction name...
Page 349: Using A Scheduled Interrupt As A High-Precision Timer (Cj1M Only)
Using a Scheduled Interrupt as a High-precision Timer (CJ1M Only) Section 6-5 Using a Scheduled Interrupt as a High-precision Timer (CJ1M Only) When using a CJ1M CPU Unit, the following functions allow a scheduled interrupt to be used as a high-precision timer. •...
Page 350: Specifying A Reset Start With Msks(690)
Using a Scheduled Interrupt as a High-precision Timer (CJ1M Only) Section 6-5 6-5-2 Specifying a Reset Start with MSKS(690) When CJ1M CPU Units are used and the MSKS(690) instruction is used to start the scheduled interrupt, the internal timer can be reset before starting the interrupt (this is called a reset start).
Page 351: Startup Settings And Maintenance
Startup Settings and Maintenance Section 6-6 Startup Settings and Maintenance This section describes the following functions related to startup and mainte- nance. • Hot Start/Hot Stop Functions • Startup Mode Setting • Power OFF Detection Delay Setting • Disabling Power OFF Interrupts •...
Page 352: Startup Mode Setting
Startup Settings and Maintenance Section 6-6 have the same status that they had before the program was stopped. (When the IOM Hold Bit is OFF, instructions will be executed after the outputs have been cleared.) PLC Power ON In order for all data* in I/O memory to be retained when the PLC is turned on (OFF →...
Page 353: Run Output
Startup Settings and Maintenance Section 6-6 6-6-3 RUN Output Some of the Power Supply Units (the C200HW-PA204R, C200HW-PA209R, CJ1W-PA205R, and CS1D-PA207R) are equipped with a RUN output. This output point is ON (closed) when the CPU Unit is operating in RUN or MONI- TOR mode and OFF (open) when the CPU Unit is in PROGRAM mode.
Page 354: Clock Functions
Startup Settings and Maintenance Section 6-6 This function can be used with sets of instructions that must be executed as a group, e.g., so that execution does not start with intermediate stored data the next time power is turned ON. Procedure 1,2,3...
Page 355: Program Protection
Startup Settings and Maintenance Section 6-6 Note The CS-series CS1 CPU Units are shipped without the backup battery installed, and the CPU Unit’s internal clock will be read 00/01/01 00:00:00 or possibly another value when the battery is connected. To use the clock func- tions, connect the battery, turn the power ON, and set the time and date with a Programming Device (Programming Console or CX-Programmer) or the FINS command (07 02, CLOCK WRITE).
Page 356 Startup Settings and Maintenance Section 6-6 ating File Memory Program Files under 1-4-2 Improved Read Protection Using Passwords in the CS Series PLC Operation Manual or the CJ Series PLC Operation Manual. Read/Write-protection Using Passwords Both read and write access to the user program area can be blocked from the CX-Programmer.
Page 357: Write-Protection From Fins Commands Sent To Cpu Units Via Networks
Startup Settings and Maintenance Section 6-6 Auxiliary Area Words Name Address Description User Program A090 to The time and date the user program was last over- Date A093 written in memory is given in BCD. A09000 to A09007 Seconds (00 to 59 BCD) A09008 to A09015 Minutes (00 to 59 BCD) A09100 to A09107...
Page 358: Remote Programming And Monitoring
The following information can be read for CS/CJ-series Units from the CX- Programer. • Manufacturing information (lot number, serial number, etc.): Facilitates providing information to OMRON when problems occur with Units. • Unit information (type, model number, correct rack/slot position): Provides an easy way to obtain mounting information.
Page 359: Flash Memory
Startup Settings and Maintenance Section 6-6 6-6-11 Flash Memory This function is supported only by the CS1-H, CJ1-H, CJ1M, or CS1D CPU Units. With CS1-H, CJ1-H, CJ1M, or CS1D CPU Units, the user program and parameters are automatically backed up in flash memory whenever they are written to or altered in the CPU Unit.
Page 360: Startup Condition Settings
Startup Settings and Maintenance Section 6-6 The amount of time required to back up data (the time the BKUP indicator will be lit) will depend on the size of the user program, as shown in the following table. User Backup processing time program size MONITOR mode PROGRAM...
Page 361 Startup Settings and Maintenance Section 6-6 This function is controller by setting the Startup Condition and Inner Board Setting described in the following table. Startup conditions PLC Setup Startup Condition Inner Board Setting (Programming Console (Programming Console address 83, bit 15) address 84, bit 15) To start without wait- 1: Enable operation without...
Page 362: Diagnostic Functions
Diagnostic Functions Section 6-7 Diagnostic Functions This section provides a brief overview of the following diagnostic and debug- ging functions. • Error Log • Output OFF Function • Failure Alarm Functions (FAL(006) and FALS(007)) • Failure Point Detection (FPD(269)) Function 6-7-1 Error Log Each time that an error occurs in a CS/CJ-series PLC, the CPU Unit stores...
Page 363: Output Off Function
Diagnostic Functions Section 6-7 Order of Error code occurrence Error Log Area Error code Error contents Minute, second Time of Day, hour occurrence Year, month Error code Error contents Minute, second Time of Day, hour occurrence Year, month Error code Error contents Minute, second Day, hour...
Page 364: Failure Point Detection
Diagnostic Functions Section 6-7 1,2,3... 1. The FAL Error Flag (A40215) or FALS Error Flag (A40106) is turned ON. 2. The corresponding error code is written to A400. 3. The error code and time of occurrence are stored in the Error Log. 4.
Page 365 Diagnostic Functions Section 6-7 Logic Diagnosis Function FPD(269) determines which input bit is causing the diagnostic output to remain OFF and outputs that bit’s address. The output can be set to bit address output (PLC memory address) or message output (ASCII). •...
Page 366: Simulating System Errors
Diagnostic Functions Section 6-7 6-7-5 Simulating System Errors This function is supported only by the CS1-H, CJ1-H, CJ1M, or CS1D CPU Units. FAL(006) and FALS(007) can be used to intentionally create fatal and non- fatal system errors. This can be used in system debugging to test display messages on Programmable Terminals (PTs) or other operator interfaces.
Page 367: Cpu Processing Modes
CPU Processing Modes Section 6-8 This function can be used when only system FAL errors need to be stored in the error log, e.g., when there are many user-defined errors generated by the program using FAL(006) and these fill up the error log too quickly. PLC Setup Programming Name...
Page 368 CPU Processing Modes Section 6-8 Normal Mode Overseeing processing Program execution Cycle time I/O refreshing Peripheral Servicing Parallel Processing Modes Program Execution Cycle Peripheral Servicing Cycle Overseeing processing Overseeing processing Cycle time for peripheral servicing Peripheral servicing Program execution Cycle time for program execution I/O refreshing Parallel Processing Modes...
Page 369 CPU Processing Modes Section 6-8 are for a program consisting of basic instructions with a cycle time of 10 ms and with one Ethernet Unit. These values are provided for reference only and will vary with the system.) Item Normal Mode Parallel Processing with Parallel Processing Asynchronous Memory...
Page 370 CPU Processing Modes Section 6-8 PLC Setup The processing mode is specified in the PLC Setup. Programming Name Setting Default CPU Unit Console refresh address timing Word 08 to CPU Pro- 00 Hex: Normal Mode 00 Hex: Start of cessing Normal operation 01 Hex: Parallel Processing...
Page 371 CPU Processing Modes Section 6-8 Peripheral Servicing Overseeing Battery check, user program memory check, etc. 0.2 ms Peripheral Event servicing for Special I/O Units Includes event servicing to servicing access I/O memory (See note.) Event servicing for CPU Bus Units Max.
Page 372: Parallel Processing Mode And Minimum Cycle Times
Peripheral Servicing Priority Mode Section 6-9 with common codes beginning with 01 Hex or forced set/reset commands with common codes beginning with 23 Hex) and 2) Servicing any received C-mode commands that access I/O memory (excluding NT Links using the peripheral or RS-232C port).
Page 373: Peripheral Servicing Priority Mode
Peripheral Servicing Priority Mode Section 6-9 6-9-1 Peripheral Servicing Priority Mode If the Peripheral Servicing Priority Mode is set, program execution will be interrupted at the specified time, the specified servicing will be performed, and program execution will be resumed. This will be repeated through program execution.
Page 374 Peripheral Servicing Priority Mode Section 6-9 PLC Setup Settings The following settings must be made in the PLC Setup to use the Peripheral Servicing Priority Mode. • Slice Time for Program Execution: 5 to 255 ms in 1-ms increments • Slice Time for Peripheral Servicing: 0.1 to 25.5 ms in 0.1-ms increments •...
Page 375: Temporarily Disabling Priority Mode Servicing
Peripheral Servicing Priority Mode Section 6-9 Note If an error is detected in the PLC Setup, A40210 will turn ON and a non-fatal error will occur. Auxiliary Area Information If the slice times are set for program execution and peripheral servicing, the total of all the program execution and peripheral servicing slice times will be stored in A266 and A267.
Page 376 Peripheral Servicing Priority Mode Section 6-9 Operation Time slice for Time slice for Time slice for program program execution peripheral servicing execution Normal peripheral Peripheral Peripheral servicing servicing servicing Execution Interrupted Execution Interrupted Execution I/O refresh Program section requiring data concurrence DI(693) executed.
Page 377 Peripheral Servicing Priority Mode Section 6-9 Applicable Program Areas Area Applicability Block programming areas Step programming areas Subroutine programs Interrupt tasks Condition Flags Flag Label Operation Error Flag Turns ON if EI(694) is executed in an interrupt task. CS1D CPU Units for Single-CPU Systems and CS1-H, CJ1-H, and CJ1M CPU Units IOSP(287) When executed, IOSP(287) disables peripheral servicing.
Page 378: Battery-Free Operation
Battery-free Operation Section 6-10 6-10 Battery-free Operation The CS-series and CJ-series PLCs can be operated without a Battery installed (or with an exhausted Battery). The procedure used for battery-free operation depends on the following items. • CPU Unit • Whether or not I/O memory (e.g., CIO Area) is maintained or not •...
Page 379 Battery-free Operation Section 6-10 CS1-H, CJ1-H, CJ1M, or CS1D CPU Units Battery-free operation is possible for CS1-H, CJ1-H, CJ1M, or CS1D CPU Units with normal operation. The user program and parameter data are auto- matically backed up to flash memory in the CPU Unit and are automatically restored from flash memory at startup.
Page 380: Other Functions
Other Functions Section 6-11 CS1 and CJ1 CPU Units Power ON Operation with a Battery Use normal operation. No Memory Card is required. CIO/WR/TIM Maintain previous PLC Setup: Disable detection a CNT/HR/DM/EM low battery voltage and set I/O Required data? I/O data at Memory Hold Bit status to be startup?
Page 381: I/O Area Allocation
Other Functions Section 6-11 PLC Setup The input response times for the 80 slots in a CS/CJ PLC (Rack 0 Slot 0 through Rack 7 slot 9) can be set in the 80 bytes in addresses 10 through 49. Programming Name Setting (Hex) Default (Hex)
Page 382 Other Functions Section 6-11...
Page 383: Section 7 Program Transfer, Trial Operation, And Debugging
SECTION 7 Program Transfer, Trial Operation, and Debugging This section describes the processes used to transfer the program to the CPU Unit and the functions that can be used to test and debug the program. Program Transfer..........Trial Operation and Debugging.
Page 384: Program Transfer
Program Transfer Section 7-1 Program Transfer A Programming Device is used to transfer the programs, PLC Setup, I/O memory data, and I/O comments to the CPU Unit with the CPU Unit in PRO- GRAM mode. Program Transfer Procedure for CX-Programmer 1,2,3...
Page 385: Differential Monitoring
Trial Operation and Debugging Section 7-2 Output Unit CPU Unit Forced Forced ON regardless of programming Forced Input ignored The following areas can be force-set and reset. CIO (I/O bits, data link bits, CPU Bus Unit bits, Special I/O Unit bits, Inner Board bits, SYSMAC BUS bits, Optical I/O Unit bits, work bits), WR Area, Timer Completion Flags, HR Area, Counter Completion Flags.
Page 386: Online Editing
Trial Operation and Debugging Section 7-2 Related Auxiliary Bits/Words Name Address Description Differentiate Monitor A50809 Turns ON when the differential monitoring condition has been met dur- Completed Flag ing differential monitoring. Note: The flag will be cleared when differential monitoring is started. 7-2-3 Online Editing The Online Editing function is used to add to or change part of a program in a...
Page 387 Trial Operation and Debugging Section 7-2 CJ1M-CPU@@: 40 edits CS1G-CPU@@H/CJ1G-CPU@@H: 160 edits CS1H-CPU@@H/CJ1H-CPU@@H/CS1D-CPU@@H/ CS1D-CPU@@S: 400 edits A message will be displayed on the CX-Programmer or Programming Console if the limit is exceeded, and further editing will not be possible until the CPU Unit has completed backing up the data.
Page 388 Trial Operation and Debugging Section 7-2 When the Online Editing Disable Bit (A52709) is turned OFF, online editing will be performed, the Online Editing Processing Flag (A20111) will turn ON, and the Online Editing Wait Flag (A20110) will turn OFF. When online editing has been completed, the Online Editing Processing Flag (A20111) will turn OFF.
Page 389: Tracing Data
Trial Operation and Debugging Section 7-2 Output Unit CPU Unit All OFF Output OFF Bit: ON 7-2-4 Tracing Data The Data Trace function samples specified I/O memory data using any one of the following timing methods, and it stores the sampled data in Trace Memory, where they can be read and checked later from a Programming Device.
Page 390 Trial Operation and Debugging Section 7-2 Sampling Start Bit Trace Start Bit Trace Trigger Monitor Flag Trace Busy Flag Trace Completed Flag Sampling The following traces can be executed. Scheduled Data Trace A scheduled data trace will sample data at fixed intervals. Specified sampling times are 10 to 2,550 ms in 10-ms units.
Page 391 Trial Operation and Debugging Section 7-2 Related Auxiliary Bits/Words Name Address Description Sampling Start Bit A50815 Use a Programming Device to turn ON this bit to start sampling. This bit must be turned ON from a Programming Device. Do not turn this bit ON and OFF from the user program. Note: The bit will be cleared when the Data Trace has been completed.
Page 393: Cqm1H, Cvm1, And Cv-Series Plcs
Appendix A PLC Comparison Charts: CJ-series, CS-series, C200HG/HE/HX, CQM1H, CVM1, and CV-series PLCs Functional Comparison Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Basic features No. of I/O 2,560 points 5,120 points 1,184 points 6,144 points 512 points pacity points Program 120 Ksteps...
Page 394 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Structure Screw mounting DIN Track mounting Backplanes Size (H x D, mm) 90 x 65 130 x 123 130 x 118 250 x 100 110 x 107 Number of I/O Units 40 Units...
Page 395 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series External mem- Medium Memory card Memory card Memory cas- Memory card Memory cas- (Flash ROM) (Flash ROM) sette (RAM, sette (ROM, (EEPROM, EEPROM, EEPROM, EPROM) EPROM) EPROM) Capacity 48 Mbytes...
Page 396: Cj Series
PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Serial communi- Peripheral cations ripher- al port Host Link (SYSMAC (Possible with WAY) connection to peripheral interface) Serial Gate- Yes (CPU Units with Yes (CPU Units with way (conver- unit version 3.0 or unit version 3.0 or...
Page 397 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Interrupts I/O interrupts Yes (Max 2 Interrupt Yes (Max. 4 or 2 Yes (Max. 2 Yes (Max. 4 Yes (4 built into Input Units: Interrupt Input Interrupt Input Interrupt Input CPU Bus Unit)
Page 398: Binary
PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Initial Input response time Set in PLC Setup Set in PLC Setup Set in PLC set- for Basic I/O Unit Setup tings Rack first addresses Set in I/O table from Set in I/O table from Set in PLC Programming...
Page 399 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Initial Power Restart Continuation Set in PLC set- supply Bit Hold Setup tings Startup mode Set in PLC Setup Set in PLC Setup Set in PLC Set in PLC Set in PLC (contd.)
Page 400: Cj1M Cpu Units)
PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Initial Pro- Programming Con- Set on DIP switch CS1: Set on DIP Set on DIP Set on DIP set- gram- sole language switch switch switch tings ming CS1-H: Set from (contd.)
Page 401 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Auxil- Errors Error log storage iary area/pointer Area, Error codes contd Initial Initializing PLC Setup No set- tings Com- PLC Link Operating Yes (PLC Link Aux- Yes (PLC Link Aux- Yes (AR) muni-...
Page 402: Yes (Rs-232C X 1)
PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series I/O Memory CIO Area WR Area Temporary Relay Area Auxiliary Area SR Area Link Area Yes (Data Link Yes (Data Link Yes (Data Link Area) Area) Area) C200H Special I/O Yes (CIO Area)
Page 403 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Online connections via networks with- With Automatic I/O Pre-Ver.2.0 CPU Yes, but for out creating I/O tables Allocation at Power Units: No Controller Link ON: Yes (for all only CPU Units Ver.
Page 404 PLC Comparison Charts Appendix A Instruction Comparison Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Sequence LOAD/AND/OR Input AND/ Instructions AND LOAD/OR LOAD LD/OR CONDITION ON Yes (*1) CONDITION OFF DOWN Yes (*1) BIT TEST TST/ Yes (Bit position Yes (Bit position Yes (Bit position Yes (Bit position...
Page 405 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Timer and TIMER Counter (BCD) Instructions TIMX Yes(*4) Yes(*4) (binary) HIGH-SPEED TIMH TIMER (BCD) TIMHX Yes(*4) Yes(*4) (binary) ONE-MS TIMER TMHH (BCD) TMHHX Yes(*4) Yes(*4) (binary) ACCUMULATIVE...
Page 406 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Compari- Symbol compari- =, <, Yes (All are sup- Yes (All are sup- Yes (*2) (Sup- Yes (*1) (Sup- son Instruc- etc. ported for LD, ported for LD, ported for AND ported for AND...
Page 407 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Data Move- MOVE ment DOUBLE MOVE MOVL Instruction MOVE NOT DOUBLE MOVE MVNL DATA EXCHANGE XCHG DOUBLE DATA XCGL EXCHANGE MOVE QUICK MOVQ BLOCK TRANS- XFER Yes (Number Yes (Number...
Page 408 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Data Shift SHIFT REGISTER Instructions REVERSIBLE SFTR SHIFT REGISTER ASYNCHRO- ASFT NOUS SHIFT REGISTER WORD SHIFT WSFT Yes (Same as Yes (Same as CV: 3 operands) CV: 3 operands) ARITHMETIC ASL/...
Page 409 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Conversion BCD-TO-BINARY/ BIN/ Instructions DOUBLE BCD-TO- BINL DOUBLE BINARY BINARY-TO-BCD/ BCD/ DOUBLE BINARY- BCDL TO-DOUBLE BCD 2’S COMPLE- NEG/ Yes (Same as Yes (Same as MENT/ DOUBLE NEGL CV but UP does...
Page 410 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Floating- FLOATING TO 16- FIX/ Yes (*1) point Math BIT/32-BIT BIN, FIXL, Instructions 16-BIT/32-BIT BIN FLT/ TO FLOATING FLTL FLOATING-POINT +F, –F, Yes (*1) ADD/FLOATING- *F, /F POINT SUB-...
Page 411: Yes (Rs-232C X 1)
PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Table Data SET STACK SSET Yes (Four words Yes (Four words Yes (Four words Processing of stack control of stack control of stack control Instructions information.
Page 412: Binary Binary
PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Data Con- SCALING trol Instruc- SCALING 2 SCL2 tions SCALING 3 SCL3 PID CONTROL Yes (Output can Yes (Output can Yes (PID and Yes (PID and Yes (PID and be switched be switched...
Page 413 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series High-speed MODE CONTROL Yes (*5) Counter/ PRESENT VALUE Yes (*5) Pulse Out- READ put Instruc- tions COUNTER FRE- PRV2 CJ1M CPU QUENCY CON- Units Ver. 2.0 or VERT later: Yes (*5) CJ1-H (all CPU...
Page 414 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Special I/O SPECIAL I/O UNIT IORD/ IORD/IOWR (Up IORD/IOWR (Up IORD/IOWR READ/WRIT Unit READ and SPE- IOWR to 96 Units. Will to 96 Units. Will Instructions CIAL I/0 UNIT not be used to...
Page 415 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Serial Com- RECEIVE Yes (Number of Yes (Number of Yes (Number of Yes (Number of munica- stored bytes stored bytes stored bytes stored bytes tions specified in specified in...
Page 416 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Network NETWORK SEND/ SEND/ Yes (Can be Yes (Can be Yes (Cannot be Yes (Can be Yes (Cannot be Instructions NETWORK RECV used for host used for host used for host used for host...
Page 417 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Failure FAILURE ALARM/ FAL/ Yes (Messages Yes (Messages Yes (Messages Yes (Messages Yes (Messages Diagnosis SEVERE FAIL- FALS ended by NUL, ended by NUL, ended by CR, ended by CR, ended by CR,...
Page 418 PLC Comparison Charts Appendix A...
Page 419 Appendix B Changes from Previous Host Link Systems There are differences between Host Link Systems created using the CS/CJ-series Serial Communications Boards (CS Series only) and Unit in comparison to Host Link Systems created with Host Link Units and CPU Units in other PLC product series.
Page 420 Changes from Previous Host Link Systems Appendix B Previous Model number Changes required for CS/CJ-series product products Wiring Other CVM1 or CV- CVM1/CV-CPU@@-E No changes have been made It may be possible to use the host computer series CPU in wiring. programs without alteration as long as the Units same communications settings (e.g., baud rate)
Page 421 Changes from Previous Host Link Systems Appendix B Previous Model number Changes required for CS/CJ-series product products Wiring Other CVM1 or CV- CVM1/CV-CPU@@-E No changes have been made It may be possible to use the host computer series CPU Units in wiring.
Page 423: Index
Index refresh mode CPU Unit addressing basic operation index registers capacities – indirect addresses internal structure memory addresses operation operands C-series Host Link Units See also index registers changes in communications specifications alarms C-series Units user-programmed alarms changes in communications specifications applications CVM1 Units file memory...
Page 424 Index EM file memory FOR-NEXT loop initializing operations See also file memory Greater Than Flag Equals Flag error log errors access error high-speed inputs error log Host Link commands failure point detection Host Link communications fatal Host Link Units illegal instruction error changes in communications specifications instruction processing error hot starting...
Page 425 Index decrement instructions differentiated instructions display instructions mathematics execution conditions floating-point math instructions failure diagnosis instructions special math instructions file memory symbol math instructions file memory instructions maximum cycle time floating-point math instructions memory increment instructions block diagram of CPU Unit memory index registers clearing input and output instructions...
Page 426 Index program structure programs and tasks Parameter Area protecting the program files remote programming restrictions Parameter Date See also block programs peripheral servicing step programming priority servicing restrictions Peripheral Servicing Priority Mode tasks and programs PLC Setup transferring the program PLCs Programming Consoles comparison...
Page 427 Index See also installation up-differentiated instructions – signed binary data user program See also programming stack processing User Program Date standby status description V–W startup automatic file transfer write-protection hot starting and stopping startup mode step programming subroutines table data processing Task Error Flag Task Flags...
Page 428 Index...
Page 429: Revision History
Revision History A manual revision code appears as a suffix to the catalog number on the front cover of the manual. Cat. No. W394-E1-08 Revision code The following table outlines the changes made to the manual during each revision. Page numbers refer to the previous version.
Page 430 Revision History Revision code Date Revised content December 2003 Information added on new functions supported by new unit versions of the CPU Units (too numerous to list). Pages xi to xx: PLP information updated. Page 72: Notes added at top of table and AND NOT and OR NOT instructions added. Pages 160, 201, 202, 228, 293, and 320: Notes added.
Page 432 W394-E1-08...

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Omron CS1G/H-CPUxx-EV1 Programming Manual

Table of Contents

Precautions

Section 1 CPU Unit Operation

Section 2 Programming

Section 3 Instruction Functions

Section 4 Tasks

Section 5 File Memory Functions

Section 6 Advanced Functions

Section 7 Program Transfer, Trial Operation, and Debugging

Plc Comparison Charts Appendix A

CS Series

CJ Series

C200Hx/Hg

Cvm1/CV

Series

Appendix A

Cqm1H

Quick Links

Chapters

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Summary of Contents for Omron CS1G/H-CPUxx-EV1