I/O Subsystem
Table 71. LAN Design Guide Section Reference
Intel ICH4-M – LAN Connect Interface (LCI)
Intel 82562ET / Intel 82562EM
Intel 82551QM / Intel 82540EP
®
10.9.2.
Intel
82801DBM ICH4-M – LAN Connect Interface Guidelines
This section contains guidelines on how to implement a Platform LAN Connect device on a system
motherboard. It should not be treated as a specification and the system designer must ensure that the
system meets the specified timings. Special care must be given to matching the LAN_CLK traces to
those of the other signals. The following signal lines are used on this interface:
LAN_CLK
LAN_RSTSYNC
LAN_RXD[2:0]
LAN_TXD[2:0]
This interface supports Intel 82562ET and Intel 82562EM components. Signal lines LAN_CLK,
LAN_RSTSYNC, LAN_RXD[0], and LAN_TXD[0] are shared by all components. The AC
characteristics for this interface are found in the Intel
M) Specification Update.
10.9.2.1. Bus Topologies
The Platform LAN Connect Interface can be configured in several topologies:
Direct point-to-point connection between the ICH4-M and the LAN component
LOM Implementation
10.9.2.1.1. LOM (LAN On Motherboard) Point-To-Point Interconnect
The following are guidelines for a single solution motherboard. Either Intel 82562EM or Intel 82562ET
is uniquely installed.
Figure 76. Single Solution Interconnect
178
Layout Section
®
Intel
ICH4-M
®
®
Intel
852GME, Intel
852GMV and Intel
Figure 75 Reference
Design Guide Section
A
Reference Section 10.9.2
B
Reference Section 10.9.2
C
Reference Section 10.9.5
®
82801DBM I/O Controller Hub 4 Mobile (ICH4-
L
LAN_CLK
LAN_RSTSYNC
LAN_RXD[2:0]
LAN_TXD[2:0]
®
852PM Chipset Platforms Design Guide
R
Platform
LAN
Connect
(PLC)