Primary Ide Connector Requirements; Figure 55. Connection Requirements For Primary Ide Connector - Intel 852GME Design Manual

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10.1.2.

Primary IDE Connector Requirements

Figure 55. Connection Requirements for Primary IDE Connector

ICH4-M
† Due to ringing,
PCIRST# must be
buffered
The following are connection requirements for Primary IDE Connector:
22 - 47
each unique motherboard design, based on signal quality.
An 8.2 k - 10 k pull-up resistor is required on IRQ14 to VCC3_3.
A 4.7-k
Series resistors can be placed on the control and data lines to improve signal quality. The resistors
are placed as close to the connector as possible. Values are determined for each unique
motherboard design.
The 10-k resistor to ground on the PDIAG#/CBLID# signal is required on the Primary
Connector. This change is to prevent the GPI pin from floating if a device is not present on the
IDE interface.
® ®
Intel 852GME, Intel 852GMV and Intel
†
PCIRST#
®
Intel
3.3V
4.7K
PIORDY (PRDSTB / PWDMARDY#)
IRQ[14]
GPIOx
10K
series resistors are required on RESET#. The correct value should be determined for
pull-up resistor to VCC3_3 is required on PIORDY and SIORDY.
®
852PM Chipset Platforms Design Guide
22 to 47
PDD[15:0]
PDA[2:0]
PDCS[3,1]#
PDIOR#
PDIOW#
PDDREQ
PDDACK#
8.2~10K
PDIAG# / CBLID#
I/O Subsystem
Ω
3.3V
CSEL
149