Figure 58. Intel 82801Dbm Ich4-M Ac'97 - Codec Connection - Intel 852GME Design Manual

I/O Subsystem
Figure 58. Intel 82801DBM ICH4-M AC'97 – Codec Connection
If a modem codec is configured as the primary AC-link Codec, there should not be any Audio Codecs
NOTE:
residing on the AC-link. The primary codec may be connected to AC_SDIN0 as documented in the Intel
ICH4-M Datasheet.
Clocking is provided from the primary codec on the link via AC_BIT_CLK, and is derived from a
24.576-MHz crystal or oscillator. Refer to the primary codec vendor for crystal or oscillator
requirements. AC_BIT_CLK is a 12.288-MHz clock driven by the primary codec to the digital
controller (ICH4-M) and to any other codec present. That clock is used as the time base for latching and
driving data. Clocking AC_BIT_CLK directly off the CK-408 clock chip's 14.31818-MHz output is
not supported.
The ICH4-M supports wake-on-ring from S1M-S5 via the AC'97 link. The codec asserts AC_SDIN to
wake the system. To provide wake capability and/or caller ID, standby power must be provided to the
modem codec.
The ICH4-M has weak pull-down/pull-ups that are always enabled. This will keep the link from floating
when the AC-link is off or there are no codecs present.
If the Shut-off bit is not set, it implies that there is a codec on the link. Therefore, AC_BIT_CLK and
AC_SDOUT will be driven by the codec and the ICH4-M respectively. However, AC_SDIN0,
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Intel ®
ICH4
SDATA_IN0
SDATA_IN1
SDATA_IN2
® ®
Intel 852GME, Intel 852GMV and Intel
RESET#
SDATA_OUT
SYNC
BIT_CLK
®
852PM Chipset Platforms Design Guide
AC / MC / AMC
Primary
Codec
AC / MC / AMC
Secondary
Codec
AC / MC / AMC
Tertiary
Codec
R