Dotclk Clock Group; Figure 93. Dotclk Clock Topology; Table 80. Dotclk Clock Routing Constraints - Intel 852GME Design Manual

R
11.2.7.

DOTCLK Clock Group

The 48-MHz DOTCLK is series terminated and routed point to point on the motherboard. This clock
operates independently and is not length tuned to any other clock.

Figure 93. DOTCLK Clock Topology

CK408

Table 80. DOTCLK Clock Routing Constraints

Class Name
Class Type
Topology
Reference Plane
Single Ended Trace Impedance ( Zo )
Nominal Inner Layer Trace Width
Nominal Outer Layer Trace Width
Minimum Spacing (see exceptions below)
Maximum Via Count
Series Termination Resistor Value
Trace Length Limits – L1
Trace Length Limits – L2
Total Length Range – L1 + L2
Length Matching Required
Breakout Exceptions
NOTES:
1. The DOTCLK is used internally by the GMCH to generate the pixel clock and must exhibit very low jitter. Care
should be taken to avoid routing through noisy areas and spacing rules should be observed. Guard traces may
be employed if necessary with ground stake vias on no less than 0.5-inch intervals.
2. If external graphics is only supported on the platform then dotclock does not need to be connected to GMCH.
® ®
Intel 852GME, Intel 852GMV and Intel
Rs
L1
Parameter
®
852PM Chipset Platforms Design Guide
Platform Clock Routing Guidelines
L2
Definition
DOTCLK
Individual Net
Series Terminated Point to Point
Ground Referenced
55 ohms ± 15%
4.0 mils
5.0 mils (pin escapes only)
25 mils
4
33 ohms ± 5 %
Up to 500 mils
2.0" to 8.0"
2.0" to 8.5"
No
5 mil trace with 5 mil space on outers
4 mil trace with 4 mil space in inners
Maximum breakout length is 0.3"
GMCH
203