Intel 82562Et/Em Disable Guidelines; Design And Layout Consideration For Intel 82540Ep / 82551Qm; Figure 81. Intel 82562Et/Em Disable And Power Down Circuitry; Table 73. Intel 82562Et/Em Control Signals - Intel 852GME Design Manual

I/O Subsystem
10.9.4.

Intel 82562ET/EM Disable Guidelines

To disable the Intel 82562ET/EM, the device must be isolated (disabled) prior to reset (RSM_PWROK)
asserting. Using a GPIO, such as GPO28 to be LAN_Enable (enabled high), LAN will default to
enabled on initial power-up and after an AC power loss. This circuit shown below will allow this
behavior. The BIOS controlling the GPIO can disable the LAN micro-controller.
Note: LAN_RST# needs to be held low for 10ms after power is stable. It is assumed that RSMRST# logic will
provide this delay. Because GPIO28 will default to high during power up, an AND gate has been
implemented to ensure the required delay for LAN_RST# is met.

Figure 81. Intel 82562ET/EM Disable and Power Down Circuitry

GPIO_LAN_ENABLE
There are four pins that can put the Intel 82562ET/EM controller in different operating states: Test_En,
Isol_Tck, Isol_Ti, and Isol_Tex. Table 73 describes the operational/disable features for this design.
The four control signals shown in the below table should be configured as follows: Test_En should be
pulled-down thru a 100- resistor. The remaining three control signals should each be connected
through 100- series resistors to the common node "Intel 82562ET/EM _Disable" of the disable circuit.

Table 73. Intel 82562ET/EM Control Signals

Test_En
0
0
1
In addition, if the LAN Connect Interface of the ICH4-M is not used, the VccLAN1_5 and the
VccLAN3_3 are still required to be powered during normal operating states. It is acceptable to power
the VccLAN1_5 and VccLAN3_3 power pins by the same voltage source that supplies power to the
Vcc1_5 and Vcc3_3 power pins. Also, the LAN_RST# pin of the ICH4-M should be pulled-down to
GND with a 10-k resistor to keep the interface disabled.
10.9.5.

Design and Layout Consideration for Intel 82540EP / 82551QM

For specific design and layout considerations for the Intel 82540EP Gigabit Ethernet Controller and the
Intel 82551QM Faster Ethernet Controller, please refer to the following documents:
184
LAN_RST#
10K 5%
Isol_Tck Isol_Ti Isol_Tex
0 0
1 1
1 1
® ®
Intel 852GME, Intel 852GMV and Intel
MMBT3906
10K 5%
State
0 Enabled
1 Disabled w/ Clock (low power)
1 Disabled w/out Clock (lowest power)
®
852PM Chipset Platforms Design Guide
R
3.3V Sus
Intel® 82562EM/ET Disable