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Renesas 7542 Manual page 59

Single-chip 8-bit cmos microcomputer
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7542 Group
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(50) Flash memory control register 2 (FMCR2) (Note 3) 0FE2
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Notes 1: X : Undefined
Fig. 72 Internal status of microcomputer at reset
Rev.3.02
Oct 31, 2006
REJ03B0006-0302
Port P0 direction register (P0D)
Port P1 direction register (P1D)
Port P2 direction register (P2D)
Port P3 direction register (P3D)
Interrupt source set register (INTSET)
Interrupt source discrimination register (INTDIS)
Compare register (low-order) (CMPL)
Compare register (high-order) (CMPH)
Capture/Compare register R/W pointer (CCRP)
Capture software trigger register (CSTR)
Compare register re-load register (CMPR)
Port P0P3 drive capacity control register (DCCR)
Pull-up control register (PULL)
Port P1P3 control register (P1P3C)
Serial I/O1 status register (SIO1STS)
Serial I/O1 control register (SIO1CON)
UART1 control register (UART1CON)
Timer A, B mode register (TABM)
Capture/Compare port register (CCPR)
Timer source selection register (TMSR)
Capture mode register (CAPM)
Compare output mode register (CMOM)
Capture/Compare status register (CCSR)
Compare interrupt source register (CISR)
Timer A (low-order) (TAL)
Timer A (high-order) (TAH)
Timer B (low-order) (TBL)
Timer B (high-order) (TBH)
Prescaler 1 (PRE1)
Timer 1 (T1)
Timer count source set register (TCSS)
Timer X mode register (TXM)
Prescaler X (PREX)
Timer X (TX)
Serial I/O2 control register (SIO2STS)
Serial I/O2 register (SIO2CON)
UART2 control register (UART2CON)
A/D control register (ADCON)
On-chip oscillation division ratio selection register (RODR)
MISRG
Watchdog timer control register (WDTCON)
Interrupt edge selection register (INTEDGE)
CPU mode register (CPUM)
Interrupt request register 1 (IREQ1)
Interrupt request register 2 (IREQ2)
Interrupt control register 1 (ICON1)
Interrupt control register 2 (ICON2)
Flash memory control register 0 (FMCR0) (Note 3)
Flash memory control register 1 (FMCR1) (Note 3)
Processor status register
Program counter
2:The content of other registers is undefined when the microcomputer is reset.
The initial values must be surely set before you use it.
3:Only flash memory version has this register.
Page 59 of 134
Address
Register contents
00
0001
16
16
X
X
X
0
0
0
0
0003
16
00
0005
16
16
00
0007
16
16
000A
00
16
16
00
000B
16
16
00
0010
16
16
00
0011
16
16
00
0012
16
16
00
0013
16
16
00
0014
16
16
00
0015
16
16
00
0016
16
16
0017
00
16
16
1
0
0
0
0
0
0
0019
16
00
001A
16
16
001B
1
1
1
0
0
0
0
16
00
001D
16
16
00
001E
16
16
00
001F
16
16
00
0020
16
16
00
0021
16
16
0022
00
16
16
00
0023
16
16
0024
FF
16
16
FF
0025
16
16
FF
0026
16
16
0027
FF
16
16
FF
0028
16
16
01
0029
16
16
00
002A
16
16
00
002B
16
16
002C
FF
16
16
FF
002D
16
16
002F
1
0
0
0
0
0
0
16
0030
00
16
16
0031
1
1
1
0
0
0
0
16
0034
0
0
0
1
0
0
0
16
0037
0
0
0
0
0
0
1
16
0038
00
16
16
0039
0
0
1
1
1
1
1
16
00
003A
16
16
1
0
0
0
0
0
0
003B
16
003C
00
16
16
00
003D
16
16
003E
00
16
16
00
003F
16
16
0FE0
0
0
0
0
0
0
0
16
0
1
0
0
0
0
0
0FE1
16
0
0
0
0
0
0
0
16
(PS)
X
X
X
X
X
1
X
(PC
)
Contents of address FFFD
16
H
Contents of address FFFC
(PC
)
16
L
0
0
0
0
0
0
0
1
0
1
0
1
X

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