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7542 Group
Store Return Address
on Stack
Restore Return
Address
Note : The condition to enable the interrupt
Fig. 12 Register push and pop at interrupt generation and subroutine call
Table 4 Push and pop instructions of accumulator or processor status register
Accumulator
Processor status register
Rev.3.02
Oct 31, 2006
REJ03B0006-0302
On-going Routine
Interrupt request
(Note)
Execute JSR
M (S)
(PC
)
H
(S)
(S – 1)
M (S)
(PC
)
L
(S)
(S – 1)
Subroutine
Execute RTS
(S)
(S + 1)
(PC
)
M (S)
L
(S)
(S + 1)
(PC
)
M (S)
H
Push instruction to stack
Page 14 of 134
M (S)
(S)
M (S)
(S)
M (S)
(S)
Interrupt
Service Routine
Execute RTI
(S)
(PS)
(S)
(PC
)
L
(S)
(PC
)
H
Interrupt enable bit is "1"
Interrupt disable flag is "0"
PHA
PHP
(PC
)
H
(S – 1)
Store Return Address
on Stack
(PC
)
L
(S – 1)
Store Contents of Processor
Status Register on Stack
(PS)
(S – 1)
I Flag "0" to "1"
Fetch the Jump Vector
(S + 1)
Restore Contents of
Processor Status Register
M (S)
(S + 1)
M (S)
Restore Return
Address
(S + 1)
M (S)
Pop instruction from stack
PLA
PLP
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