Renesas 7542 Manual page 44

7542 Group
P0 /CAP
0 0
P1 /CAP
0 0
Ring
/512
P3 /CAP
0 1 Capture channel 0
Ring
Capture channel 1
/512
Fig. 48 Block diagram of input capture
Ring/512
P1 /CAP
0 0
P0 /CAP
0 0
Capture 0 input
port bits
(001E , bits 0, 1)
16
Fig. 49 Block diagram of capture channel 0
Rev.3.02 Oct 31, 2006
REJ03B0006-0302
Trigger input channel 0
Capture 0 timer source bit
Capture register 0
read pointer
(0012 , bit 4)
16
Capture 0
status bit
(0022 , bit 4)
16
Capture latch 00
software trigger bit
(0013 , bit 0)
16
Capture
Digital filter
trigger
Capture 0 noise
filter clock
selection bits
(0020 , bits 4, 5)
16
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Capture latch 00
Capture latch 01
Data bus
Capture latch 00 (16)
Capture pointer
(0013 , bits 4, 5)
16
Rising
Capture latch 0 (16)
Capture 0 timer
source bit
(001F , bit 4)
16
Timer A counter (16)
Timer A latch
Timer A counter
Timer B counter
Timer B latch
Capture register
Capture latch 01 (16)
Capture 0
Falling
interrupt edge
selection bits
(0020 , bits 0, 1)
16
Capture interrupt
Timer B counter (16)