Renesas 7542 Manual page 37

7542 Group
P0 /CMP
1 0
Compare 0 timer source bit
Compare channel 0
Compare channel 1
P0 /CMP
2 1
Compare channel 2
P3 /CMP
1 2
Compare channel 3
P3 /CMP
2 3
Fig. 39 Block diagram of output compare
Compare 0 output
port bit
(001E , bit 2)
16
I/O port
P0 /CMP
1 0
Compare 0 output
level latch
(0021
Compare interrupt
Fig. 40 Block diagram of compare channel 0
Rev.3.02 Oct 31, 2006
REJ03B0006-0302
Wave latch channel 0
Compare register
write pointer
(0012
Compare latch 00, 01
re-load bit
(0014
Compare 0 output Compare 0 trigger
status bit enable bit
(0022 , bit 0)
(0021
16
Output latch
, bit 0)
16
Page 37 of 134
Compare latch 00
Compare latch 01
, bits 0 to 2)
16
Compare buffer 00 (16)
, bit 0)
16
Compare latch 00 (16)
, bit 4)
16
Compare latch 00
interrupt source
bit (0023 , bit 0)
16
Compare latch 01
interrupt source
bit (0023 , bit 1)
16
Timer A latch
Timer A counter
Timer B counter
Timer B latch
Data bus
Compare buffer 01 (16)
Compare latch 01 (16)
Compare register
Timer A counter (16)
Timer B counter (16)
Compare 0 timer
source bit
(001F , bit 0)
16