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7542 Group
Notes on On-chip Oscillation Division Ratio
• When the clock division ratio is switched from f(X
oscillator by the clock division ratio selection bits (bits 7 and 6 of
CPU mode register (address 3B
sion ratio (bits 1 and 0 of on-chip oscillation division ratio
selection register (address 37
middle-speed mode (R
OSC
Notes on Oscillation Stop Detection Circuit
1. After the reset by the oscillation stop detection, the value of fol-
lowing bits are retained, not initialized.
• Ceramic or RC oscillation stop detection function active bit
Bit 1 of MISRG (address 3B
• Oscillation stop detection status bit
Bit 3 of MISRG
2. Oscillation stop detection status bit is initialized ("0") by the fol-
lowing operation.
• External reset
• Write "0" data to the ceramic or RC oscillation stop detection
function active bit.
3. The oscillation stop detection circuit is not included in the emu-
lator MCU "M37542RSS".
Notes on CPU Rewrite Mode
Take the notes described below when rewriting the flash memory
in CPU rewrite mode.
1. Operation speed
During CPU rewrite mode, set the system clock φ to 4.0 MHz or
less using the clock division ratio selection bits (bits 6 and 7 of
CPU mode register).
2. Instructions inhibited against use
The instructions which refer to the internal data of the flash
memory cannot be used during CPU rewrite mode.
3. Interrupts inhibited against use
The interrupts cannot be used during CPU rewrite mode because
they refer to the internal data of the flash memory.
4. Watchdog timer
If the watchdog timer has been already activated, internal reset
due to an underflow will not occur because the watchdog timer is
surely initialized during program or erase.
5. Reset
Reset is always valid. The MCU is activated using the boot mode
at release of reset in the condition of CNVss = "H", so that the pro-
gram will begin at the address which is stored in addresses
FFFC
and FFFD
of the boot ROM area.
16
16
Rev.3.02
Oct 31, 2006
REJ03B0006-0302
) to on-chip
IN
)), the on-chip oscillator divi-
16
)) is "10
" (on-chip oscillator
16
2
/8)).
)
16
Page 134 of 134
Electric Characteristic Differences Between
Mask ROM, Flash Memory MCUs
There are differences in electric characteristics, operation margin,
noise immunity, and noise radiation among mask ROM and flash
memory version MCUs due to the differences in the manufacturing
processes.
When manufacturing an application system with the flash memory
and then switching to use of the mask ROM version, perform suffi-
cient evaluations for the commercial samples of the mask ROM
version.
Note on Power Source Voltage
When the power source voltage value of a microcomputer is less
than the value which is indicated as the recommended operating
conditions, the microcomputer does not operate normally and may
perform unstable operation.
In a system where the power source voltage drops slowly when
the power source voltage drops or the power supply is turned off,
reset a microcomputer when the supply voltage is less than the
recommended operating conditions and design a system not to
cause errors to the system by this unstable operation.
NOTES ON HARDWARE
Handling of Power Source Pin
In order to avoid a latch-up occurrence, connect a capacitor suit-
able for high frequencies as bypass capacitor between power
source pin (Vcc pin) and GND pin (Vss pin). Besides, connect the
capacitor to as close as possible. For bypass capacitor which
should not be located too far from the pins to be connected, a ce-
ramic capacitor of 0.01 µF to 0.1 µF is recommended.
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