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7542 Group
Notes on A/D conversion
1. Analog input pin
Make the signal source impedance for analog input low, or equip
an analog input pin with an external capacitor of 0.01µF to 1µF.
Further, be sure to verify the operation of application products on
the user side.
<Reason>
An analog input pin includes the capacitor for analog voltage com-
parison. Accordingly, when signals from signal source with high
impedance are input to an analog input pin, charge and discharge
noise generates. This may cause the A/D conversion/comparison
precision to be worse.
2. Clock frequency during A/D conversion
The comparator consists of a capacity coupling, and a charge of
the capacity will be lost if the clock frequency is too low. This may
cause the A/D conversion precision to be worse. Accordingly, set
f(X
) in order that the A/D conversion clock is 250 kHz or over
IN
during A/D conversion.
3. A/D conversion clock selection
Select f(X
)/2 as an A/D conversion clock by setting the A/D con-
IN
version clock selection bit (bit 3 of A/D control register (address
34
)) when RC oscillation is used.
16
The f(X
) can be also used as an A/D conversion clock only when
IN
ceramic oscillation or on-chip oscillator is used.
4. Analog input pin selection
P2
/AN
and P2
/AN
can be used only for PRSP0036GA-A pack-
6
6
7
7
age version.
5. Read A/D conversion register
• 8-bit read
Read only the A/D conversion low-order register (address 35
•10-bit read
Read the A/D conversion high-ordrer register (address 36
and then, read the A/D conversion low-order register (address
35
).
16
In this case, the high-order 6 bits of address 36
when read.
Rev.3.02
Oct 31, 2006
REJ03B0006-0302
16
) first,
16
returns "0"
16
Page 132 of 134
6. A/D conversion accuracy
As for AD translation accuracy, on the following operating condi-
tions, accuracy may become low.
(1) Since the analog circuit inside a microcomputer becomes sen-
sitive to noise when V
voltage, accuracy may become low rather than the case
where V
voltage and Vcc voltage are set up to the same
REF
value..
(2) When V
voltage is lower than [ 3.0 V ], the accuracy at the
REF
low temperature may become extremely low compared with
that at room temperature. When the system would be used at
low temperature, the use at V
mended.
Notes on Watchdog Timer
1. The watchdog timer is operating during the wait mode. Write
data to the watchdog timer control register to prevent timer un-
derflow.
2. The watchdog timer stops during the stop mode. However, the
watchdog timer is running during the oscillation stabilizing time
after the STP instruction is released. In order to avoid the un-
derflow of the watchdog timer, the watchdog timer control
register must be written just before executing the STP instruc-
tion.
3. The STP instruction function selection bit (bit 6 of watchdog
timer control register (address 0039
once after releasing reset. After rewriting it is disable to write
any data to this bit.
4. A count source of watchdog timer is affected by the clock divi-
sion selection bit of the CPU mode register.
The f(X
) clock is supplied to the watchdog timer when select-
IN
).
ing f(X
) as the CPU clock.
IN
The on-chip oscillator output is supplied to the watchdog timer
when selecting the on-chip oscillator output as the CPU clock.
Notes on RESET pin
1. Connecting capacitor
In case where the RESET signal rise time is long, connect a ce-
ramic capacitor or others across the RESET pin and the Vss pin.
And use a 1000 pF or more capacitor for high frequency use.
When connecting the capacitor, note the following :
• Make the length of the wiring which is connected to a capacitor
as short as possible.
• Be sure to verify the operation of application products on the
user side.
<Reason>
If the several nanosecond or several ten nanosecond impulse
noise enters the RESET pin, it may cause a microcomputer fail-
ure.
voltage is set up lower than Vcc
REF
=3.0 V or more is recom-
REF
)) can be rewritten only
16
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