Renesas 7542 Manual page 39

7542 Group
Timer count clock
Timer underflow
Timer count value
000C 000B 000A 0009 0008 0007 0006 0005 0004 0003 0002 0001
Compare latch 00
Compare latch 01
Compare 00 match
Compare 01 match
Compare output
Compare interrupt
Compare status bit
Fig. 42 Output compare mode (general waveform)
Timer count clock
Timer underflow
Timer count value
Compare latch 00
Compare latch 01
Compare latch 00 write
Compare latch 01 write
Compare latch 00, 01 re-load bit
Compare latch 00, 01 re-load signal
Compare 00 match
Compare 01 match
Compare output
Compare interrupt
Compare status bit
Fig. 43 Output compare mode (compare register write timing)
Rev.3.02 Oct 31, 2006
REJ03B0006-0302
0 1
Note: Compare interrupt occurs only for the interrupt source selected by Compare interrupt source register.
000C 000B 000A 0009 0008 0007 0006 0005 0004 0003 0002 0001
0
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000B
0005
000B
0005
1
Re-load the count value
0000 000F 000E 000D 000C 000B
0
Re-load the count value
0000 000F 000E 000D 000C 000B
000E
000C
0 1 0