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7542 Group
[CPU mode register] CPUM
The CPU mode register contains the stack page selection bit, etc..
This register is allocated at address 003B
Switching method of CPU mode register
Switch the CPU mode register (CPUM) at the head of program af-
ter releasing Reset in the following method.
Switch the oscillation mode
selection bit (bit 5 of CPUM)
Wait by on-chip oscillator operation
until establishment of oscillator clock
Switch the clock division ratio
selection bits (bits 6 and 7 of CPUM)
Note: After system is released from reset, an on-chip oscillator turns active automatically
and system operation is started.
Fig. 14 Switching method of CPU mode register
Rev.3.02
Oct 31, 2006
REJ03B0006-0302
.
16
After releasing reset
Main routine
Page 16 of 134
b7
Note 1: These bits can be rewritten only once after releasing reset. After rewriting
it is disable to write any data to bits. However, by reset bits are
initialized and can be rewritten, again.
(It is not disable to write any data to bits for emulator MCU
"M37542RSS".)
2: These bits are used only when a ceramic oscillation is selected.
Do not use these when an RC oscillation is selected.
Fig. 13 Structure of CPU mode register
Start with an on-chip oscillator
An initial value is set as a ceramic
oscillation mode. When it is switched to an
RC oscillation, its oscillation starts.
When using a ceramic oscillation, wait until
establlishment of oscillation from oscillation starts.
When using an RC oscillation, wait time is not
required basically (time to execute the instruction to
switch from an on-chip oscillator meets the
requirement).
Select 1/1, 1/2, 1/8 or on-chip oscillator.
b0
CPU mode register
(CPUM: address 003B
, initial value: 80
16
16
Processor mode bits (Note 1)
b1 b0
0
0 Single-chip mode
0
1
Not available
1
0
1
1
Stack page selection bit
0 : 0 page
1 : 1 page
On-chip oscillator oscillation control bit
0 : On-chip oscillator oscillation enabled
1 : On-chip oscillator oscillation stop
X
oscillation control bit
IN
0 : Ceramic or RC oscillation enabled
1 : Ceramic or RC oscillation stop
Oscillation mode selection bit (Note 1)
0 : Ceramic oscillation
1 : RC oscillation
Clock division ratio selection bits
b7 b6
0
0 : f(φ) = f(X
)/2 (High-speed mode)
IN
0
1 : f(φ) = f(X
)/8 (Middle-speed mode)
IN
1
0 : applied from on-chip oscillator
1
1 : f(φ) = f(X
) (Double-speed mode)(Note 2)
IN
)
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