Download Print this page

Renesas 7542 Manual page 135

Single-chip 8-bit cmos microcomputer
Hide thumbs Also See for 7542:

Advertisement

REVISION HISTORY
Rev.
Date
Page
1.00 Nov 27, 2002
2.00 Apr 21, 2003
65 to 72
73 to 82
2.01 Dec 03, 2003
85 to103
2.02 Jan 06, 2004
First edition issued
1
FEATURES; Memory size revised.
8
Memory size; Flash memory size revised.
Fig.8; ROM size revised.
9
Table 2; ROM size revised.
10
Central Processing Unit (CPU); Description revised.
28
Fig.26; Port P0
36
Fig.42; Modulation output revised.
37
Fig.43; Modulation output revised.
53
Reset Circuit; Description revised.
55
(3) RC oscillation; Description revised.
56
(1) Oscillation control
• Stop mode
Description about FLASH added.
57
Fig.77; revised.
FLASH MEMORY MODE added.
ELECTRICAL CHARACTERISTICS added.
1
FEATURES: Interrupt, Power source voltage, Power dissipation revised.
8
Fig. 8: Development schedule revised.
9
Table 2: ROM size for Flash memory version revised.
13
Fig. 12: Note added.
15
Fig. 14: Flash memory control register 2 added.
28
Fig. 26: "CPU mode register" added, description for timer 1 interrupt request revised.
30
Fig. 29: "CPU mode register" added.
33
Fig. 37 and Fig. 38: Pin name added.
34
Fig. 39: Pin name added.
40
Fig. 46 and Fig. 47: Pin name added.
51
A-D Converter revised.
54
Fig. 70 Flash memory control register 2 added.
59
Fig. 79 (5), (6) revised.
64
A-D Converter revised.
65
DATA REQUIRED FOR MASK ORDERS revised.
68
Description of flash memory control register 0 (bit 2), Fig. 83 revised.
69
Description of flash memory control register 2, Fig. 85 and Table 8 added.
70
Fig. 86 revised.
71
Table 9 revised.
ELECTRICAL CHARACTERISTICS;
General purpose revised.
Extended operating temperature version added.
1
FEATURES: The minimum instruction execution time revised.
Note 2 eliminated.
10
Stack pointer (S): Reference number of Figure in description revised.
79
Table 12: P0
(BUSY output) added.
7
82
Fig. 95: "BUSY" added to P0
83
Fig. 96, Fig. 97: "BUSY" added to P0
84
Fig. 98, Fig. 99: CNV
91
Table 19, Table 20 Timing requirements (General purpose)
Vcc for FLASH ROM version and Mask ROM version revised.
93
Table 22, Table 23 Switching characteristics (General purpose)
Vcc for FLASH ROM version and Mask ROM version revised.
7542 Group Datasheet
Description
Summary
direction register revised.
3
.
7
7
revised.
SS
A - 1
.

Advertisement

loading