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7542 Group
5. Read-modify-write instruction
Do not execute a read-modify-write instruction to the read invalid
address (SFR).
The read-modify-write instruction operates in the following se-
quence: read one-byte of data from memory, modify the data,
write the data back to original memory. The following instructions
are classified as the read-modify-write instructions in the 740
Family.
(1) Bit management instructions: CLB, SEB
(2) Shift and rotate instructions: ASL, LSR, ROL, ROR, RRF
(3) Add and subtract instructions: DEC, INC
(4) Logical operation instructions (1's complement): COM
Add and subtract/logical operation instructions (ADC, SBC, AND,
EOR, and ORA) when T flag = "1" operate in the way as the read-
modify-write instruction. Do not execute the read invalid SFR.
<Reason>
When the read-modify-write instruction is executed to read invalid
SFR, the instruction may cause the following consequence: the in-
struction reads unspecified data from the area due to the read
invalid condition. Then the instruction modifies this unspecified
data and writes the data to the area. The result will be random
data written to the area or some unexpected event.
NOTES ON PERIPHERAL FUNCTIONS
Notes on I/O Ports
1. Setting of 32-pin version and PWQN0036KA-A package version
(1) Set direction registers of ports P2
(2) Select P3
for the INT
function by the INT1 input port selec-
3
1
tion bit (bit 2 of interrupt edge selection register (address
3A
)).
16
(3) Be sure to set P3
/INT
6
1
P1P3 control register (address 17
2. Port P0P3 drive capacity control register
The number of LED drive port (drive capacity is HIGH) is 8.
3. Pull-up control register
When using each port which built in pull-up resistor as an output
port, the pull-up control bit of corresponding port becomes invalid,
and pull-up resistor is not connected.
<Reason>
Pull-up control is effective only when each direction register is set
to the input mode.
Rev.3.02
Oct 31, 2006
REJ03B0006-0302
, P2
, P3
and P3
to output.
6
7
5
6
input level selection bit (bit 1 of port
)) to "0".
16
Page 126 of 134
4. Notes in stand-by state
1
In stand-by state*
for low-power dissipation, do not make input
levels of an input port and an I/O port "undefined".
Pull-up (connect the port to Vcc) or pull-down (connect the port to
Vss) these ports through a resistor.
When determining a resistance value, note the following points:
• External circuit
• Variation of output levels during the ordinary operation
When using a built-in pull-up resistor, note on varied current val-
ues:
• When setting as an input port : Fix its input level
• When setting as an output port : Prevent current from flowing out
to external.
<Reason>
The output transistor becomes the OFF state, which causes the
ports to be the high-impedance state. Note that the level becomes
"undefined" depending on external circuits.
Accordingly, the potential which is input to the input buffer in a mi-
crocomputer is unstable in the state that input levels of an input
port and an I/O port are "undefined". This may cause power
source current.
1
*
stand-by state : the stop mode by executing the STP instruction
the wait mode by executing the WIT instruction
5. Modifying output data with bit managing instruction
When the port latch of an I/O port is modified with the bit manag-
2
ing instruction*
, the value of the unspecified bit may be changed.
<Reason>
The bit managing instructions are read-modify-write form instruc-
tions for reading and writing data by a byte unit. Accordingly, when
these instructions are executed on a bit of the port latch of an I/O
port, the following is executed to all bits of the port latch.
• As for a bit which is set for an input port :
The pin state is read in the CPU, and is written to this bit after bit
managing.
• As for a bit which is set for an output port :
The bit value of the port latch is read in the CPU, and is written to
this bit after bit managing.
Note the following :
• Even when a port which is set as an output port is changed for
an input port, its port latch holds the output data.
• As for a bit of the port latch which is set for an input port, its
value may be changed even when not specified with a bit man-
aging instruction in case where the pin state differs from its port
latch contents.
2
*
bit managing instructions : SEB, and CLB instructions
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