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7542 Group
A/D Converter
The functional blocks of the A/D converter are described below.
[A/D conversion register] AD
The A/D conversion register is a read-only register that stores the
result of A/D conversion. Do not read out this register during an A/
D conversion.
[A/D control register] ADCON
The A/D control register controls the A/D converter.
Bit 2 to 0 are analog input pin selection bits.
Bit 3 is the A/D conversion clock selection bit. When "0" is set to this
bit, the A/D conversion clock is f(X
is 122 cycles of f(X
). When "1" is set to this bit, the A/D conversion
IN
clock is f(X
) and the A/D conversion time is 61 cycles of f(X
IN
Bit 4 is the A/D conversion completion bit. The value of this bit re-
mains at "0" during A/D conversion, and changes to "1" at
completion of A/D conversion.
A/D conversion is started by setting this bit to "0".
[Comparison voltage generator]
The comparison voltage generator divides the voltage between
AV
and V
by 1024, and outputs the divided voltages.
SS
REF
[Channel selector]
The channel selector selects one of ports P2
and inputs the voltage to the comparator.
[Comparator and control circuit]
The comparator and control circuit compares an analog input volt-
age with the comparison voltage and stores its result into the A/D
conversion register. When A/D conversion is completed, the con-
trol circuit sets the A/D conversion completion bit and the A/D
interrupt request bit to "1". Because the comparator is constructed
linked to a capacitor, set f(X
clock is 250 kHz or over during A/D conversion.
Notes on A/D converter
As for AD translation accuracy, on the following operating condi-
tions, accuracy may become low.
(1) Since the analog circuit inside a microcomputer becomes sen-
sitive to noise when V
REF
voltage, accuracy may become low rather than the case
where V
voltage and Vcc voltage are set up to the same
REF
value..
(2) When V
voltage is lower than [ 3.0 V ], the accuracy at the
REF
low temperature may become extremely low compared with
that at room temperature. When the system would be used at
low temperature, the use at V
mended.
Rev.3.02
Oct 31, 2006
REJ03B0006-0302
)/2 and the A/D conversion time
IN
/AN
to P2
7
7
) in order that the A/D conversion
IN
voltage is set up lower than Vcc
=3.0 V or more is recom-
REF
Page 55 of 134
b7
).
IN
Notes 1: These can be used only for 36 pin version.
2: A/D conversion clock=f(X
Fig. 65 Structure of A/D control register
Read 8-bit (Read only address 0035
(Address 0035
Read 10-bit (read in order address 0036
/AN
,
0
0
(Address 0036
(Address 0035
Note: High-order 6-bit of address 0036
Fig. 66 Structure of A/D conversion register
b0
A/D control register
(ADCON : address 0034
Analog input pin selection bits
000 : P2
/AN
0
0
001 : P2
/AN
1
1
010 : P2
/AN
2
2
011 : P2
/AN
3
3
100 : P2
/AN
4
4
101 : P2
/AN
5
5
110 : P2
/AN
(Note 1)
6
6
111 : P2
/AN
(Note 1)
7
7
A/D conversion clock selection bit (Note 2)
0 : f(X
)/2
IN
1 : f(X
)
IN
A/D conversion completion bit
0 : Conversion in progress
1 : Conversion completed
Not used (returns "0" when read)
) can be used
IN
only when ceramic oscillation or on-chip oscillator is used.
Select f(X
)/2 when RC oscillation is used.
IN
)
16
b7
)
16
b9 b8 b7 b6 b5 b4 b3 b2
, 0035
16
b7
)
16
b7
)
16
b7 b6 b5 b4 b3 b2 b1 b0
returns "0" when read.
16
, initial value: 10
)
16
16
b0
)
16
b0
b9 b8
b0
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