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7542 Group
On-chip oscillation division ratio
At on-chip oscillator mode, division ratio of on-chip oscillator for
CPU clock is selected by setting value of on-chip oscillation divi-
sion ratio selection register. The division ratio of on-chip oscillation
for CPU clock is selected from among 1/1, 1/2, 1/8, 1/128. The op-
eration clock for the peripheral function block is not changed by
setting value of this register.
Notes on On-chip Oscillation Division Ratio
• When system is released from reset, R
middle-speed mode) is selected for CPU clock.
• When state transition from the ceramic or RC oscillation to on-
chip oscillator, R
/8 (on-chip oscillator middle-speed mode)
OSC
is selected for CPU clock.
• When the MCU operates by on-chip oscillator for the main clock
without external oscillation circuit, connect X
through a resistor and leave X
Set "10010x00
" (x = 0 or 1) to CPUM.
2
b7
b0
On-chip oscillation division ratio selection register
(RODR: address 0037
On-chip oscillator division ratio
Not used (returns "0" when read)
Fig. 78 Structure of on-chip oscillation division ratio selection register
Rev.3.02
Oct 31, 2006
REJ03B0006-0302
/8 (on-chip oscillator
OSC
pin to V
IN
pin open.
OUT
, initial value: 02
)
16
16
b1 b0
0 0: On-chip oscillator double-speed mode (R
0 1: On-chip oscillator high-speed mode (R
1 0: On-chip oscillator middle-speed mode (R
1 1: On-chip oscillator low-speed mode (R
Page 62 of 134
CC
/1)
OSC
/2)
OSC
/8)
OSC
/128)
OSC
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