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Renesas 7542 Manual page 73

Single-chip 8-bit cmos microcomputer
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7542 Group
32K bytes ROM Product
0000
16
SFR area
0040
16
Internal RAM area
RAM
(1K bytes)
043F
16
0FE0
16
SFR area
0FFF
16
7000
16
Internal flash memory
area
(4K bytes) (Note 3)
8000
16
Internal flash memory
area
(32K bytes) (Note 3)
FFFF
16
Notes 1: The boot ROM area can be rewritten in a parallel I/O mode. (Access to except boot ROM area is disablrd.)
2: To specify a block, use the maximum address in the block.
3: The mask ROM version has the reserved ROM area. Note the difference of the area.
Fig. 94 Block diagram of built-in flash memory
Boot Mode
The control program for CPU rewrite mode must be written into
the User ROM or Boot ROM area in parallel I/O mode beforehand.
(If the control program is written into the Boot ROM area, the stan-
dard serial I/O mode becomes unusable.)
See Figure 94 for details about the Boot ROM area.
Normal microcomputer mode is entered when the microcomputer
is reset with pulling CNV
SS
operating using the control program in the User ROM area.
When the microcomputer is reset and the CNV
pulling the P3
(RP) pin low, P3
7
and P0
/TxD
pin high, the CPU starts operating (start address of
5
2
program is stored into addresses FFFC
control program in the Boot ROM area. This mode is called the
"Boot mode". Also, User ROM area can be rewritten using the con-
trol program in the Boot ROM area.
Block Address
Block addresses refer to the maximum address of each block.
These addresses are used in the block erase command.
Rev.3.02
Oct 31, 2006
REJ03B0006-0302
User ROM area
7000
16
Data block B :
2K bytes
RAM
7800
16
Data block A :
2K bytes
8000
16
block 2 : 16K bytes
C000
16
block 1 : 8K bytes
E000
16
block 0 : 8K bytes
FFFF
16
pin low. In this case, the CPU starts
pin high after
SS
(CE) pin high, P0
/S
2
6
CLK
and FFFD
) using the
16
16
Page 73 of 134
16K bytes ROM Product
0000
16
SFR area
0040
16
Internal RAM area
(1K bytes)
043F
16
0FE0
16
SFR area
0FFF
16
7000
16
Internal flash memory
area
(4K bytes) (Note 3)
7FFF
16
C000
16
Internal flash memory
area
(16K bytes) (Note 3)
FFFF
16
CPU Rewrite Mode
In CPU rewrite mode, the internal flash memory can be operated
on (read, program, or erase) under control of the Central Process-
ing Unit (CPU).
In CPU rewrite mode, only the User ROM area shown in Figure 94
can be rewritten; the Boot ROM area cannot be rewritten. Make
sure the program and block erase commands are issued for only
the User ROM area and each block area.
The control program for CPU rewrite mode can be stored in either
User ROM or Boot ROM area. In the CPU rewrite mode, because
pin low
the flash memory cannot be read from the CPU, the rewrite con-
trol program must be transferred to internal RAM area before it
can be executed.
• Outline Performance
CPU rewrite mode is usable in the single-chip or Boot mode. The
only User ROM area can be rewritten.
In CPU rewrite mode, the CPU erases, programs and reads the in-
ternal flash memory as instructed by software commands. This
rewrite control program must be transferred to internal RAM area
before it can be executed.
The MCU enters CPU rewrite mode by setting "1" to the CPU re-
write mode select bit (bit 1 of address 0FE0
commands can be accepted.
Use software commands to control program and erase operations.
Whether a program or erase operation has terminated normally or
in error can be verified by reading the status register.
SFR area
7000
16
Data block B :
2K bytes
7800
16
Data block A :
2K bytes
7FFF
16
C000
16
block 1 : 8K bytes
F000
E000
16
block 0 : 8K bytes
FFFF
FFFF
16
16
Boot ROM area
4K bytes
16
). Then, software
16

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