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Renesas 7542 Manual page 78

Single-chip 8-bit cmos microcomputer
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7542 Group
• Block Erase Command (20
By writing the command code "20
confirmation command code "D0
second bus cycle that follows, the block erase (erase and erase
verify) operation starts for the block address of the flash memory
to be specified.
Whether the block erase operation is completed can be confirmed
by read status register or the RY/BY status flag of flash memory
control register. At the same time the block erase operation starts,
the read status register mode is automatically entered, so that the
contents of the status register can be read out. The status register
bit 7 (SR7) is set to "0" at the same time the block erase operation
starts and is returned to "1" upon completion of the block erase
operation. In this case, the read status register mode remains ac-
tive until the read array command (FF
The RY/BY status flag is "0" during block erase operation and "1"
when the block erase operation is completed as is the status reg-
ister bit 7.
After the block erase ends, erase results can be checked by read-
ing the status register. For details, refer to the section where the
status register is detailed.
Rev.3.02
Oct 31, 2006
REJ03B0006-0302
/D0
)
16
16
" in the first bus cycle and the
16
" and the block address in the
16
) is written.
16
Page 78 of 134
Start
Write "20
"
16
"D0
"
16
Write
Block address
Read status register
SR7 = "1"?
or
RY/BY = "1"?
YES
SR5 = "0" ?
YES
Erase completed
(write read command "
FF
"
16
)
Fig. 100 Erase flowchart
NO
NO
Erase error

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