NEC V850E/RS1 User Manual page 792

(2) Operation in software STOP mode or after software STOP mode is released
If the software STOP mode is set with the CLME bit = 1, the monitor operation is stopped in the
software STOP mode and while the oscillation stabilization time is being counted. After the oscilla-
tion stabilization time, the monitor operation is automatically started.
Figure 25-4: Operation in Software STOP Mode or After Software STOP Mode Is Released
CPU operation
Ring-OSC clock
CLM status
When bit 0 (CLME) of the clock monitor mode register (CLM) is set to 1 before entering STOP
mode, monitoring automatically starts at the end of the X1 input clock oscillation stabilization time.
Monitoring is stopped in STOP mode and during the oscillation stabilization time.
(3) Operation while CPU is operating on Ring-OSC clock (CCLSF bit of CCLS register = 1)
The monitor operation is not started when the CCLSF bit is 1, even if the CLME bit is set to 1.
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Software
Normal
STOP
operation
Main clock
Oscillation
stops
CLM
Monitoring
Chapter 25 Clock Monitor
Oscillation stabilization time
Oscillation stabilization time
(set by OSTS register)
Monitoring stopped
User's Manual U16702EE3V2UD00
Normal operation
Monitoring