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The V850E/RS1 includes two asynchronous serial interfaces A (UARTA).
12.1 Features
•
Transfer rate:
•
Full-duplex communication:
• UARTA receive data register n (UAnRX)
• UARTA transmit data register n (UAnTX)
•
2-pin configuration
• TXDAn: Output pin of transmit data
• RXDAn: Input pin of receive data
•
Reception error detection function:
•
Interrupt sources:
• Reception complete interrupt (INTUAnR): An interrupt is generated in the reception enabled
• Transmission enable interrupt (INTUAnT): Generated when transmit data is transferred from the
•
Character length of transmit/receive data:
•
Parity function:
•
Transmission stop bit:
•
Dedicated baud rate generator
•
MSB/LSB first transfer selectable
•
Transmit/receive data reversible
Remark:
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Chapter 12 Asynchronous Serial Interface A (UARTA)
status by ORing three types of reception errors. It is also generated when receive data is
transferred from the shift register to receive buffer register n after completion of serial transfer.
transmit buffer register to the shift register in the transmission enabled status.
n = 0 to 1
User's Manual U16702EE3V2UD00
300 bps to 312.5 kbps
parity error, framing error, overrun error
2 types
7 or 8 bits
odd, even, 0, none
1 or 2 bits
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