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7.6 Timer Synchronization Operation Function
Timer P and timer Q have a timer synchronized operation function (tuned operation mode).
The timers that can be synchronized are listed in Table 7-3 (√ : Settable, ×: Not settable).
Cautions: 1. The tuned operation mode is enabled or disabled by the TPnSYE bit of the
Tables 7-4 and 7-5 show the timer modes that can be used in the tuned operation mode
(√ : Settable, ×: Not settable).
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Chapter 7 16-Bit Timer/Event Counter P
Table 7-3: Tuned Operation Mode of Timer
Master Timer
TMP0
TMP1
TMp2
TMP3
TPnCTL1 register and TQnSYE bit of the TQnCTL1 register. For TMP2, either or
both TMP3 and TMQ0 can be specified as slaves.
2. Set the tuned operation mode using the following procedure.
•
Set the TPnSYE bit of the TPnCTL1 register and the TQnSYE bit of the
TQnCTL1 register of the slave timer to enable the tuned operation. Set the
TPnMD2 to TPnMD0 bits of the TPnCTL1 register and TPnMD2 to TPnMD0 bits
of the TQnCTL1 register of the slave timer to the free-running mode.
•
Set the timer mode by using the TPnMD2 to TPnMD0 bits of the TPnCTL1
register and the TPnMD2 to TPnMD0 bits of the TQnCTL1 register. At this
time, do not set the TPnSYE bit of the TPnCTL1 register and the TQnSYE bit
of the TQnCTL1 register of the master timer.
•
Set the compare register value of the master and slave timers.
•
Set the TPnCE bit of the TPnCTL0 register and the TQnCE bit of the TQnCTL0
register of the slave timer to enable operation on the internal operating clock.
•
Set the TPnCE bit of the TPnCTL0 register and the TQnCE bit of the TQnCTL0
register of the master timer to enable operation on the internal operating
clock.
Table 7-4: Timer Modes Usable in Tuned Operation Mode
Free-Running
Master Timer
Mode
TMP0
TMP2
TMQ1
User's Manual U16702EE3V2UD00
Slave Timer
-
TMQ0
PWM Mode
√
√
√
√
√
√
V850E/RS1
√
√
Triangular Wave
PWM Mode
×
×
√
299
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