NEC V850E/RS1 User Manual page 146

Note: AD14, AD15 and Address/Data bus I/O are only for the µPD70F3403 and µPD70F3403A
146
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Chapter 4 Port Functions
Figure 4-44: Port Mode Control Register 9 (PMC9) Format (2/3)
PMC915 P915 pin operation mode specification
0 I/O port
TIP11/TOP11/INTP6/AD15
1
External interrupt input6 / Address/Data bus I/O
PMC914 P914 pin operation mode specification
0 I/O port
TIP10/TOP10/INTP5/AD14
1
External interrupt input5 / Address/Data bus I/O
PMC913 P913 pin operation mode specification
0 I/O port
TIP20/TOP20/INTP4/PCL (TMP2 input0 / TMP2 output0 /
1
External interrupt input4 Programmable clock output)
PMC912 P912 pin operation mode specification
0 I/O port
TIP21/TOP21/CS302 (TMP2 input1 / TMP2 output1 /
1
Chip select2 output forCSI30)
PMC911 P911 pin operation mode specification
0 I/O port
1 [DRST] (OCD mode reset input)
PMC910 P910 pin operation mode specification
0 I/O port
1 (CS301)/[DDO] (Chip select1 for CSI30/OCD mode data output)
PMC99 P99 pin operation mode specification
0 I/O port
1 SCKB1/DMS (Serial clock input/output for CSIB1 /OCD mode set input)
PMC98 P98 pin operation mode specification
0 I/O port
1 SOB1/[DCK] (Serial output for CSIB1 / OCD mode clock input)
PMC97 P97 pin operation mode specification
0 I/O port
1 SIB1/[DDI] (Serial input for CSIB1 / OCD mode data input)
User's Manual U16702EE3V2UD00
Note
(TMP1 input1 / TMP1 output1 /
Note
)
Note
(TMP1 input0 / TMP1 output0 /
Note
)