Operation Of Low-Voltage Detector; To Use For Internal Reset Signal - NEC V850E/RS1 User Manual

32-/16-bit single-chip microcontroller with can interface
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24.4 Operation of Low-Voltage Detector

Depending on the setting of the LVIMD bit, an interrupt signal (INTLVI) or an internal reset signal is
generated.
How to specify each operation is described below, together with timing charts.

24.4.1 To use for internal reset signal

<To start operation>
<1> Mask the interrupt of LVI.
<2> Select the voltage to be detected by using the LVIS0 bit.
<3> Set the LVION bit to 1 (to enable operation).
<4> Insert a wait cycle of 0.1 ms (TYP) (target value) or more by software.
<5> By using the LVIF bit, check if the supply voltage > detected voltage.
<6> Set the LVIMD bit to 1 (to generate an internal reset signal).
Caution:
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Chapter 24 Low-Voltage Detector
If LVIMD is set to 1, the contents of the LVIM and LVIS registers cannot be changed
until a reset request other than LVI is generated.
User's Manual U16702EE3V2UD00
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