NEC V850E/RS1 User Manual page 99

32-/16-bit single-chip microcontroller with can interface
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Address
FFFFF6D1H
FFFFF702H
FFFFF706H
FFFFF712H
FFFFF712H Port 9 function control expansion register L PFCE9L
FFFFF713H Port 9 function control expansion register H PFCE9H
FFFFF802H
FFFFF80CH
FFFFF820H
FFFFF822H
FFFFF824H
FFFFF828H
FFFFF82CH
FFFFF82DH
FFFFF82EH
FFFFF82FH
FFFFF860H
FFFFF864H
FFFFF868H
FFFFF86CH
FFFFF870H
FFFFF87AH
FFFFF888H
FFFFF890H
FFFFF891H
FFFFF892H
FFFFF8B0H
FFFFF8B1H
FFFFF9FCH
FFFFF9FEH
FFFFFA00H
FFFFFA01H
FFFFFA02H
FFFFFA03H
FFFFFA04H
FFFFFA06H
FFFFFA07H
Note: After reset release, when CPU starts operation by the ring-OSC for some reason or accident, it is set to
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Table 3-4: Peripheral I/O Registers (7/12)
Description
Watchdog timer enable register
Port 1 function control expansion register
Port 3 function control expansion register
Port 9 function control expansion register
System status register
Ring-OSC mode register
Power save mode register
Clock control register
PLL lock status register
Processor clock control register
PLL control register 0
PLL control register 1
CPU operation clock status register
Programmable clock mode register
Clock selection register 0
Clock selection register 1
Clock selection register 2
Clock selection register 3
Clock monitor mode register
Port Function Swap control register
Reset status flag register
Low-voltage detection register
Low-voltage detection level selection
register
Internal RAM data status register
BRG0 prescaler mode register
BRG0 precaler compare register
On-chip debug shared port setting
register
Peripheral emulation register
UARTA0 control register 0
UARTA0 control register 1
UARTA0 control register 2
UARTA0 option control register 0
UARTA0 status register
UARTA0 reception data register
UARTA0 transmission data register
01H.
User's Manual U16702EE3V2UD00
Chapter 3 CPU Function
Symbol
WDTE
PFCE1
PFCE3
PFCE9
SYS
RCM
PSMR
CKC
LOCKR
PCC
PLLCTL0
PLLCTL1
CCLS
PCLM
OCKS0
OCKS1
OCKS2
OCKS3
CLM
PSWAP
RESF
LVIM
LVIS
RAMS
PRSM0
PRSCM0
OCDM
PEUM1
UA0CTL0
UA0CTL1
UA0CTL2
UA0OPT0
UA0STR
UA0RX
UA0TX
Manipulatable bits
Default
R/W
1-bit
8-bit
16-bit
×
R/W
9AH
×
×
R/W
00H
×
×
R/W
00H
×
R/W
0000H
×
×
R/W
00H
×
×
R/W
00H
×
×
R/W
00H
×
×
R/W
00H
×
×
R/W
00H
×
×
R/W
03H
×
×
R
02H
×
×
R/W
00H
×
×
R/W
00H
×
×
R/W
00H
×
×
R
00H
×
×
R/W
01H
×
R/W
11H
×
R/W
10H
×
R/W
00H
×
R/W
00H
×
×
R/W
00H
×
×
R/W
00H
×
×
R/W
00H
×
×
R/W
00H
×
R/W
00H
×
×
R/W
01H
×
R/W
00H
×
R/W
00H
×
×
R/W
01H
×
×
R/W
00H
×
×
R/W
10H
×
R/W
00H
×
R/W
FFH
×
×
R/W
14H
×
×
R/W
00H
×
R
FFH
×
R/W
FFH
value
Note
99

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