NEC V850E/RS1 User Manual page 466

(2) Queued CSI Operation Mode Registers (CSIM0, CSIM1)
The CSIM registers control the Queued CSI macro's operations.
These registers can be read or written in 1-bit and 8-bit units.
TRMD, DIR, CSIT, CSWE, CSMD bits can only be written when CTXE = 0 and CRXE = 0.
The registers are initialized to 00H at reset.
Symbol
CSIMn
(n = 0, 1)
POWER
Clearing POWER = "0" resets the internal circuits asynchronously, stops operation and sets the
Queued CSI to standby state. Input clock is not provided to internal circuits.
Set POWER = "1" to activate the Queued CSI.
Caution:
CRXE
TRMD
Caution:
466
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Chapter 14 Queued CSI (CSI30, CSI31)
Figure 14-2: Queued CSI Operation Mode Registers (CSIM0, CSIM1) Format (1/2)
7 6 5
POWER CTXE CRXE
0 Stop macro operation clock (Reset internal control circuits)
1 Provide macro operation clock
When changing the POWER bit, do not change any other bit at the same time.
While POWER="0", the only registers that can be accessed are CSIM, SFDB, SFDBL,
and SFA.
Set the POWER bit before writing any of the other bits of CSIMn.
CTXE
0 Transmission disabled
1 Transmission enabled
0 Receive disabled
1 Receive enabled
0 Single buffer transfer mode
1 FIFO buffer transfer mode
Write is permitted only when CTXE = 0 and CRXE = 0.
4 3 2
TRMD DIR CSIT CSWE
Queued CSI operation clock control
Transmission enable/disable
Receive enable/disable
Transfer mode select
User's Manual U16702EE3V2UD00
1 0 Address
FFFFFD40H,
CSMD
FFFFFD60H
After
R/W
reset
R/W 00H