NEC V850E/RS1 User Manual page 335

Note: The 16-bit counter is not cleared upon a match between the 16-bit counter and the CCRk buffer
Caution:
Remark:
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Chapter 8 16-Bit Timer/Event Counter Q
Figure 8-24: Flowchart of Basic Operation in One-Shot Pulse Mode
Wait for trigger.
16-bit counter stands by at 0000H.
register.
The 16-bit counter is not cleared even if the trigger is input while the counter is
counting up, and the trigger input is ignored.
n = 0 to 1
m = 0 to 3
k = 1 to 3
User's Manual U16702EE3V2UD00
START
Initial setting
•
Select clock.
(TQnCTL1: TQnEEE = 0)
(TQnCTL0: TQnCKS2 to TQnCKS0)
•
Set one-shot pulse mode.
(TQnCTL1: TQnMD2 to TQnMD0 = 011)
•
Set compare register.
(TQnCCRm)
Enable timer operation (TQnCE = 1)
→ Transfer values of TQnCCR0
to CCR0 buffer register
Wait for trigger.
16-bit counter stands by at FFFFH
Input external trigger (TIQn0 pin)
or TQnEST = 1
→ 16-bit counter starts counting
16-bit counter matches
Note
CCRk buffer register
16-bit counter matches
CCR0 buffer register.
Clear 16-bit counter
INTTQnCCk occurs
INTTQnCC0 occurs
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