Control Registers - NEC V850E/RS1 User Manual

32-/16-bit single-chip microcontroller with can interface
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16.6 Control Registers

(1)
CAN global control register (CnGMCTRL)
The CnGMCTRL register is used to control the operation of the CAN module.
(a) Read
CnGMCTRL MBON
(b) Write
CnGMCTRL
(a) Read
MBON
0
1
Cautions: 1. While the MBON bit is cleared (to 0), software access to the message buffers
Remark:
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Chapter 16 FCAN Controller
Figure 16-23: CAN Global Control Register (CnGMCTRL) Format (1/2)
15
14
13
0
0
7
6
5
0
0
0
15
14
13
0
0
0
7
6
5
0
0
0
Bit enabling access to message buffer register, transmit/receive history registers
Write access and read access to the message buffer register and the transmit/receive history list
registers is disabled.
Write access and read access to the message buffer register and the transmit/receive history list
registers is enabled.
(CnMDATA0m,
CnMDATA1m,
CnMDATA23m,
CnMDATA4m,
CnMDATA7m, CnMDATA67m, CnMDLCm, CnMCONFm, CnMIDLm, CnMIDHm, and
CnMCTRLm), or registers related to transmit history or receive history (CnLOPT,
CnTGPT, CnLIPT, and CnRGPT) is disabled.
2. This bit is read-only. Even if 1 is written to MBON while it is 0, the value of MBON
does not change, and access to the message buffer registers, or registers related
to transmit history or receive history remains disabled.
When the CAN sleep mode/CAN stop mode is entered, or when the GOM bit is cleared to 0,
the MBON bit is cleared to 0.
When the CAN sleep mode/CAN stop mode is released, or when the GOM bit is set to 1,
the MBON bit is set to 1.
User's Manual U16702EE3V2UD00
12
11
10
9
0
0
0
0
4
3
2
1
0
0
0
EFSD
12
11
10
9
Set
0
0
0
EFSD
4
3
2
1
0
0
0
0
CnMDATA01m,
CnMDATA5m,
8
Address R/W After reset
0
R/W
0000H
see Table
0
16-4
GOM
8
Address R/W After reset
Set
GOM
0
Clear
GOM
CnMDATA2m,
CnMDATA3m,
CnMDATA45m,
CnMDATA6m,

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