Description Of The Fifo Buffer Transfer Mode - NEC V850E/RS1 User Manual

14.3.8 Description of the FIFO Buffer Transfer Mode

When the TRMD bit in the CSIM register is set "1", the Queued CSI operates in FIFO buffer transfer
mode.
Transfer start condition in FIFO buffer transfer mode:
[CTXE = 1 or CRXE = 1] and
[Data exists in FIFO (SFEMP = 0)]
The transmission data number must be set in SFN[3:0]. Note that writing a value greater than 16 to the
SFN register is prohibited, as the FIFO buffer design can hold up to 16 elements only.
The transfer starts by copying the first data element - pointed to by SIO Load/Store FIFO pointer - to the
SIO shift register. At that time the transmission status flag CSOT is set to "1", and the CS3n[3:0] pins
output the CS value from the FIFO.
When the transfer of the data element is finished, the received data overwrites the location in the FIFO
using the SIO Load/Store FIFO pointer, and the SIO Load/Store FIFO pointer is then incremented.
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Chapter 14 Queued CSI (CSI30, CSI31)
Figure 14-19: FIFO Buffer Transfer Mode Data Handling
19 16 15
CS Data
3, 2, 1, 0 15, 14, 13, ......
CS data 4
CS data 3 Transmission data 3
CS data 2 Transmission data 2
CS data 1 Transmission data 1
CS data 0 Transmission data 0
SFDB
SFCS
15, 14, 13, ......2, 1, 0
3, 2, 1, 0
SFCS register
SFDB register
CS3n3 to CS3n0 pins
SO3n
User's Manual U16702EE3V2UD00
0
2, 1, 0
15
14
13
12
11
10
9
8
7
6
5
4
3
SIO Load/Store
2
FIFO pointer
1
0
SFP
3, 2, 1, 0
SFA register
SIO
SI3n pin
SIRB
SIRBE
INC
Write FIFO
pointer
INC
Read FIFO
INC
pointer
483