Check The Setup/Hold With Single Clock, Multiple Clock Edges - Agilent Technologies 1670G Series Service Manual

Check the setup/hold with single clock, multiple clock edges

Select the logic analyzer setup/hold time.
1
a In the logic analyzer Format menu, select Master Clock.
b Select and activate any multiple clock edge.
c Select the Setup/Hold field, then select the setup/hold to be tested for all pods. The
first time through this test, use the top combination in the following table.
Setup/Hold Combinations
3.5/0.0 ns
-0.5/4.0 ns
d Select Done to exit the setup/hold combinations.
To test the single-clock, multiple-edge, state acquisition (logic analyzer)
Testing Performance
3–49