External Clock Reference Inputs And Clock Reference Output - Agilent Technologies OmniBER OTN Series Performance Verification Manual

Verification.book Page 24 Monday, January 19, 2004 1:40 PM
1
Performance Tests

External Clock Reference Inputs and Clock Reference Output

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Specifications
Clock Rate
2.048 Mb/s MTS
2.048 MHz Clock
1.544 Mb/s BITS
The 2 MHz input is only available when SDH or En rate is selected on the
NO TE
Transmitter. The DS1 input is only available when SONET or T-Carrier rate
is selected on the Transmitter.
BITS Clock is not a binary format signal. Signal is a Ternary All 1's DS-1
signal with ESF Framing, clocked at 1.544 MHz.
Description
The test uses a PDH/DSn test set and a Frequency Counter
connected to the appropriate external Clock input and output
ports. When the Transmitter is set to external Clock the
reference Clock output port timing and signal rate generation is
derived from the external Clock source.
Description
Accepts timing reference as per ITU-T
G.703-1998
Accepts timing reference as per ITU-T
G.703-1998
Accepts DS-1 timing reference as per
TA-TSY-000378
Verification Manual