To Test The Single-Clock, Multiple-Edge, State Acquisition (Logic Analyzer); Set Up The Equipment - Agilent Technologies 1670G Series Service Manual

Logic analyzers
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To test the single-clock, multiple-edge, state acquisition
(logic analyzer)
Testing the single-clock, multiple-edge, state acquisition verifies the performance of
the following specifications:
Minimum master-to-master clock time
Maximum state acquisition speed
Setup/Hold time for single-clock, multiple-edge, state acquisition
This test checks two combinations of data using a multiple-edge single clock at two
selected setup/hold times.
Equipment Required
Equipment
Pulse Generator
Digitizing Oscilloscope
Adapter
SMA Coax Cable (Qty 3)
Coupler
BNC Test Connector,
6x2 (Qty 4)

Set up the equipment

Turn on the equipment required and the logic analyzer. Let them warm up for
1
30 minutes before beginning the test if you have not already done so.
Set up the pulse generator according to the following table.
2
Pulse Generator Setup
Timebase
Channel 2
Mode: Int
Mode: Pulse
Divide: PULSE ÷ 1
Period: 13.333 ns
Width: 3.500 ns
Critical Specifications
150 MHz 3.0 ns pulse width, < 600 ps rise time
≥ 6 GHz bandwidth, < 58 ps rise time
SMA(m)-BNC(f)
18 GHz bandwidth
BNC(m)(m)
Period
Divide: Divide ÷ 1
Ampl: 0.50 V
Offs: 0.00 V
Recommended
Model/Part
8133A option 003
54750A w/ 54751A
1250-1200
8120-4948
1250-0216
Channel 1
Mode: Square
Delay: 0.000 ns
3–41

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