Agilent Technologies 1670G Series Service Manual page 74

Logic analyzers
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Testing Performance
To test the single-clock, multiple-edge, state acquisition (logic analyzer)
Using the Delay mode of the pulse generator channel 2, position the pulses
2
according to the setup time of the setup/hold combination selected, +0.0 ps or
−100 ps.
a On the Oscilloscope, select [Define meas] Define ∆ Time - Stop edge: rising.
b In the oscilloscope timebase menu, select Position. Using the oscilloscope knob,
position the falling edge of the data waveform so that it is centered on the display.
c On the oscilloscope, select [Shift] ∆ Time. Select Start src: channel 1, then select
[Enter] to display the setup time (∆ Time(1)-(2)).
d Adjust the pulse generator channel 2 Delay until the pulses are aligned according the
the setup time of the setup/hold combination selected, +0.0 ps or -100 ps.
Select the clock to be tested.
3
a Select the clock field to be tested, then select the clock as indicated in the table. The
first time through this test, use the top multiple-edge clock in the following table.
Clocks
J
K
L
M
b Connect the clock to be tested to the pulse generator channel 1 output.
c Select Done to exit the Master Clock menu.
3–50

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