Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual page 9

Programming Model ................................................................... 5-55
Synchronization of Software and DMA .................................. 5-56
Single-buffer DMA Transfers ............................................. 5-58
Continuous Transfers Using Autobuffering ........................ 5-58
Descriptor Structures ........................................................ 5-60
Descriptor Queue Management ......................................... 5-61
Descriptor Queue Using Interrupts on Every Descriptor 5-62
Descriptor Queue Using Minimal Interrupts .................. 5-63
Software Triggered Descriptor Fetches ............................... 5-65
DMA Registers ........................................................................... 5-67
DMA Channel Registers ........................................................ 5-68
DMAx_PERIPHERAL_MAP/
MDMA_yy_PERIPHERAL_MAP Registers ................... 5-71
DMAx_CONFIG/MDMA_yy_CONFIG Registers ........... 5-74
DMAx_IRQ_STATUS/
MDMA_yy_IRQ_STATUS Registers .............................. 5-78
DMAx_START_ADDR/
MDMA_yy_START_ADDR Registers ............................ 5-82
DMAx_CURR_ADDR/MDMA_yy_CURR_ADDR
Registers ........................................................................ 5-83
DMAx_X_COUNT/MDMA_yy_X_COUNT Registers .... 5-85
DMAx_CURR_X_COUNT/
MDMA_yy_CURR_X_COUNT Registers ..................... 5-86
DMAx_X_MODIFY/
MDMA_yy_X_MODIFY Registers ................................ 5-88
ADSP-BF537 Blackfin Processor Hardware Reference
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