DMA Registers
HMDMAx_ECURGENT Registers
The handshake MDMA edge count urgent register (
shown in
Figure
the handshake MDMA edge count register is greater than this threshold,
the MDMA request is urgent and might get higher priority.
Handshake MDMA Edge Count Urgent Registers (HMDMAx_ECURGENT)
HMDMA0:
0xFFC0 330C
HMDMA1:
0xFFC0 334C
Figure 5-24. Handshake MDMA Edge Count Urgent Registers
HMDMAx_ECOVERFLOW Registers
The handshake MDMA edge count overflow interrupt register (
, shown in
ECOVERFLOW)
field in the handshake MDMA edge count register is greater than
ECOUNT
this threshold, an overflow interrupt is generated.
Handshake MDMA Edge Count Overflow Interrupt Registers (HMDMAx_ECOVERFLOW)
HMDMA0:
0xFFC0 3310
HMDMA1:
0xFFC0 3350
Figure 5-25. Handshake MDMA Edge Count Overflow Interrupt
Registers
5-104
5-24, holds the urgent threshold. If the
15 14 13 12 11 10
9
8
1
1
1
1
1
1
1
1
Figure
5-25, holds the interrupt threshold. If the
15 14 13 12 11 10
9
8
1
1
1
1
1
1
1
1
ADSP-BF537 Blackfin Processor Hardware Reference
HMDMAx_ECURGENT)
7
6
5
4
3
2
1
0
1
1
1
1
1
1
1
1
7
6
5
4
3
2
1
0
1
1
1
1
1
1
1
1
,
field in
ECOUNT
Reset = 0xFFFF
UTHE[15:0] (Urgent
Threshold)
HMDMAx_
Reset = 0xFFFF
ITHR[15:0] (Interrupt
Threshold)
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