Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual page 137

System Interrupts
of the service routine, or the instruction is followed by another set
SSYNC
of instructions before the service routine returns. Commonly, a pop-mul-
tiple instruction is used for this purpose as shown in Listing 4-1.
The level-sensitive nature of peripheral interrupts enables more than one
of them to share the same IVG channel and therefore the same interrupt
priority. This is programmable using the assignment registers. Then a
common service routine typically interrogates the register to
SIC_ISR
determine the signalling interrupt source. If multiple peripherals are
requesting interrupts at the same time, it is up to the service routine to
either service all requests in a single pass or to service them one by one. If
only one request is serviced and the respective request is cleared by soft-
ware before the instruction executes, the same service routine is
RTI
invoked another time because the second request is still pending. While
the first approach may require fewer cycles to service both requests, the
second approach enables higher priority requests to be serviced more
quickly in a non-nested interrupt system setup.
ADSP-BF537 Blackfin Processor Hardware Reference 4-25