Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual page 230

DMA Registers
DMAx_X_COUNT
transfer. After a 2D DMA session is complete,
and
DMAx_CURR_X_COUNT = 0
Current Outer Loop Count Registers (DMAx_CURR_Y_COUNT/
MDMA_yy_CURR_Y_COUNT)
R/W prior to enabling channel; RO after enabling channel
For Memory-
15 14 13 12 11 10
mapped
addresses, see
X
Table 5-18.
Figure 5-15. Current Outer Loop Count Registers
Table 5-18. Current Outer Loop Count Register Memory-mapped
Addresses
Register Name
DMA0_CURR_Y_COUNT
DMA1_CURR_Y_COUNT
DMA2_CURR_Y_COUNT
DMA3_CURR_Y_COUNT
DMA4_CURR_Y_COUNT
DMA5_CURR_Y_COUNT
DMA6_CURR_Y_COUNT
DMA7_CURR_Y_COUNT
DMA8_CURR_Y_COUNT
DMA9_CURR_Y_COUNT
DMA10_CURR_Y_COUNT
5-92
or 1 to 0 transition), signifying completion of an entire row
.
9 8
X X X X X X X
Memory-mapped Address
0xFFC0 0C38
0xFFC0 0C78
0xFFC0 0CB8
0xFFC0 0CF8
0xFFC0 0D38
0xFFC0 0D78
0xFFC0 0DB8
0xFFC0 0DF8
0xFFC0 0E38
0xFFC0 0E78
0xFFC0 0EB8
ADSP-BF537 Blackfin Processor Hardware Reference
DMAx_CURR_Y_COUNT = 1
7 6 5 4 3 2 1 0
X X X X X X X X
Reset = Undefined
CURR_Y_COUNT[15:0]
(Current Outer Loop
Count)
Loaded by Y_COUNT
at the beginning of each
2D DMA session; not
used for 1D DMA