Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual page 86

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Table of Contents

Instruction Set Description

small final memory size. The instruction set also provides fully featured

multifunction instructions that allow the programmer to use many of the

processor core resources in a single instruction. Coupled with many fea-

tures more often seen on microcontrollers, this instruction set is very

efficient when compiling C and C++ source code. In addition, the archi-

tecture supports both user (algorithm/application code) and supervisor

(O/S kernel, device drivers, debuggers, ISRs) modes of operation, allowing

multiple levels of access to core resources.

The assembly language, which takes advantage of the processor's unique

architecture, offers these advantages:

• Embedded 16/32-bit microcontroller features, such as arbitrary bit

and bit field manipulation, insertion, and extraction; integer opera-

tions on 8-, 16-, and 32-bit data types; and separate user and

supervisor stack pointers

• Seamlessly integrated DSP/CPU features optimized for both 8-bit

and 16-bit operations

• A multi-issue load/store modified Harvard architecture, which sup-

ports two 16-bit MAC or four 8-bit ALU + two load/store + two

pointer updates per cycle

• All registers, I/O, and memory mapped into a unified 4G byte

memory space, providing a simplified programming model

Code density enhancements include intermixing of 16- and 32-bit

instructions with no mode switching or code segregation. Frequently used

instructions are encoded in 16 bits.

ADSP-BF537 Blackfin Processor Hardware Reference