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10.1.2 Block Diagram
Figure 10-1 shows a block diagram of the WDT.
Interrupt signal
(interval timer)
Reset
(internal, external)
Legend
TCNT:
Timer counter
TCSR:
Timer control/status register
RSTCSR:
Reset control/status register
10.1.3 Pin Configuration
Table 10-1 describes the WDT output pin.*
Table 10-1 WDT Pin
Name
Abbreviation
RESO
Reset output
Notes: 1. Shows the masked ROM version pin. The F-ZTAT does not have any pins used by the
WDT. For F-ZTAT version, see section 15.11 Notes on Flash Memory
Programming/Erasing.
2. Open-drain output. Externally pull-up to Vcc whether or not the reset output is used
308
Overflow
Interrupt
control
RSTCSR
Reset control
Clock
Figure 10-1 WDT Block Diagram
1
I/O
Function
2
Output*
External output of the watchdog timer reset signal
TCNT
TCSR
Clock
selector
Internal
data bus
Read/
write
control
Internal clock sources
ø/2
ø/32
ø/64
ø/128
ø/256
ø/512
ø/2048
ø/4096
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