12.1.3
Pin Configuration
Table 12-1 shows the Smart Card interface pin configuration.
Table 12-1 Smart Card Interface Pins
Pin Name
Serial clock pin 0
Receive data pin 0
Transmit data pin 0
12.1.4
Register Configuration
Table 12-2 shows the registers used by the Smart Card interface. Details of SMR, BRR, SCR,
TDR, and RDR are the same as for the normal SCI function: see the register descriptions in
section 11, Serial Communication Interface.
Table 12-2 Smart Card Interface Registers
1
Address*
Name
H'FFB0
Serial mode register
H'FFB1
Bit rate register
H'FFB2
Serial control register
H'FFB3
Transmit data register
H'FFB4
Serial status register
H'FFB5
Receive data register
H'FFB6
Smart card mode
register
Notes: 1. Lower 16 bits of the address.
2. Can only be written with 0 for flag clearing.
Abbreviation
I/O
SCK
Output
0
RxD
Input
0
TxD
Output
0
Abbreviation
SMR
BRR
SCR
TDR
SSR
RDR
SCMR
Function
SCI
clock output
0
SCI
receive data input
0
SCI
transmit data output
0
R/W
Initial Value
R/W
H'00
R/W
H'FF
R/W
H'00
R/W
H'FF
2
R/(W)*
H'84
R
H'00
R/W
H'F2
385