Hitachi H8/3022 Hardware Manual page 615

NDRB—Next Data Register B
• Same output trigger for TPC output groups 2 and 3
Address H'FFA4
Bit
NDR15
Initial value
Read/Write
Address H'FFA6
Bit
Initial value
Read/Write
• Different output triggers for TPC output groups 2 and 3
Address H'FFA4
Bit
NDR15
Initial value
Read/Write
Address H'FFA6
Bit
Initial value
Read/Write
Note: * Since this LSI does not have a TP
606
7 6
NDR14 NDR13
0 0
R/W R/W
Next output data for
TPC output group 3*
7 6
— —
1 1
— —
7 6
NDR14 NDR13
0 0
R/W R/W
Next output data for
TPC output group 3*
7 6
— —
1 1
— —
5 4
NDR12 NDR11
0 0
R/W R/W
5 4
— —
1 1
— —
5 4
NDR12
0 0
R/W R/W
5 4
— — NDR11
1 1
— —
pin, the TP signal cannot be output off-chip.
14 14
H'A4/H'A6
3 2
NDR10 NDR9
0 0
R/W R/W
Next output data for
TPC output group 2
3 2
— —
1 1
— —
3 2
— —
1 1
— —
3 2
NDR10 NDR9
0 0
R/W R/W
Next output data for
TPC output group 2
TPC
1 0
NDR8
0 0
R/W R/W
1 0
— —
1 1
— —
1 0
— —
1 1
— —
1 0
NDR8
0 0
R/W R/W