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P8DDR—Port 8 Data Direction Register
Bit
Initial value
Read/Write
P7DR—Port 7 Data Register
Bit
Initial value
Read/Write
Note:
Determined by pins P7 to P7 .
P8DR—Port 8 Data Register
Bit
Initial value
Read/Write
7
6
—
—
1
1
—
—
7
6
P7
P7
7
6
—
—
*
*
R
R
The port 7 pin states are read from these bits
7
7
6
—
—
1
1
—
—
5
4
—
—
1
0
—
W
5
4
P7
P7
5
4
—
—
*
*
R
R
0
5
4
—
—
1
0
—
R/W
H'CD
3
2
—
—
P8 DDR
0
0
W
W
Port 8 input/output select
0 Generic input
1 Generic output
H'CE
3
2
P7
P7
3
2
—
—
*
*
R
R
H'CF
3
2
—
—
0
0
R/W
R/W
Data for port 8 pins
Port 8
1
0
P8 DDR
1
0
0
0
W
W
Port 7
1
0
P7
P7
1
0
—
—
*
*
R
R
Port 8
1
0
P8
P8
1
0
0
0
R/W
R/W
621
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