18.3.3 Clock Timing
Clock timing is shown below.
• Oscillator settling timing
Figure 18-13 shows the oscillator settling timing.
ø
V
CC
STBY
t
RES
18.3.4 TPC and I/O Port Timing
TPC and I/O port timing is shown below.
ø
Ports 1 to 3,
5 to 9, A, and
B (read)
Ports 1 to 3,
5, 6, 8, 9, A,
and B (write)
538
OSC1
Figure 18-13 Oscillator Settling Timing
T
1
Figure 18-14 TPC and I/O Port Input/Output Timing
T
2
t
t
PRS
PRH
T
3
t
PWD
t
OSC1