Hitachi H8/3022 Hardware Manual page 598

TIER0—Timer Interrupt Enable Register 0
Bit
Initial value
Read/Write
7 6
— —
1 1
— —
Input capture/compare match interrupt enable B
0 IMIB interrupt requested by IMFB is disabled
1 IMIB interrupt requested by IMFB is enabled
Overflow interrupt enable
0 OVI interrupt requested by OVF is disabled
1 OVI interrupt requested by OVF is enabled
5 4
— —
1 1
— —
Input capture/compare match interrupt enable A
0 IMIA interrupt requested by IMFA is disabled
1 IMIA interrupt requested by IMFA is enabled
H'66
3 2
— OVIE IMIEB
1 0
— R/W R/W
ITU0
1 0
IMIEA
0 0
R/W
589