Hitachi H8/3022 Hardware Manual page 537

Table 18-13 Timing of On-Chip Supporting Modules
Conditions: V = 3.0 V to 3.6 V, AV
CC
T = –20°C to +75°C
a
Item
ITU Timer output delay time
Timer input setup time
Timer clock input setup time
Timer clock
pulse width
SCI Input clock
cycle
Input clock rise time
Input clock fall time
Input clock pulse width
Transmit data delay time
Receive data setup time
(synchronous)
Receive data hold time
(synchronous clock input)
Receive data hold time
(synchronous clock output)
Ports and Output data delay time
TPC
Input data setup time
Input data hold time
528
= 3.6 V to 5.5 V, V
CC
Symbol
t
TOCD
t
TICS
t
TCKS
Single edge t
TCKWH
Both edges t
TCKWL
Asynchronous t
Scyc
Synchronous
t
SCKr
t
SCKf
t
SCKW
t
TXD
t
RXS
t
RXH
t
PWD
t
PRS
t
PRH
= AV = 0 V, ø = 2 to 18 MHz,
SS SS
Min Max Unit
— 100 ns
50 —
50 —
1.5 — t
cyc
2.5 —
4 —
6 —
— 1.5
— 1.5
0.4 0.6 t
Scyc
— 100 ns
100 —
100 —
0 —
— 100 ns
50 —
50 —
Test
Conditions
Figure 18-15
Figure 18-16
Figure 18-17
Figure 18-18
Figure 18-14