Table of Contents
Advertisement
PADR—Port A Data Register
Bit
Initial value
Read/Write
PBDDR—Port B Data Direction Register
Bit
PB DDR
Initial value
Read/Write
PBDR—Port B Data Register
Bit
Initial value
Read/Write
7
6
PA
PA
7
6
0
0
R/W
R/W
7
6
—
PB DDR
7
0
0
W
W
7
6
PB
—
7
0
0
R/W
R/W
5
4
PA
PA
5
4
0
0
R/W
R/W
Data for port A pins
5
4
PB DDR
PB DDR
5
4
0
0
W
W
Port B input/output select
0 Generic input
1 Generic output
5
4
PB
PB
5
4
0
0
R/W
R/W
Data for port B pins
H'D3
3
2
PA
PA
3
2
0
0
R/W
R/W
H'D4
3
2
PB DDR
PB DDR
3
2
0
0
W
W
H'D6
3
2
PB
PB
3
2
0
0
R/W
R/W
Port A
1
0
PA
PA
1
0
0
0
R/W
R/W
Port B
1
0
PB DDR
1
0
0
0
W
W
Port B
1
0
PB
PB
1
0
0
0
R/W
R/W
623
Advertisement
Table of Contents
