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TIER3—Timer Interrupt Enable Register 3
Bit
Initial value
Read/Write
Note: Bit functions are the same as for ITU0.
TSR3—Timer Status Register 3
Bit
Initial value
Read/Write
Note: Only 0 can be written to clear the flag.
TCNT3 H/L—Timer Counter 3 H/L
Bit
15
Initial value
0
Read/Write
R/W
7
6
—
—
1
1
—
—
7
6
—
—
1
1
—
—
Overflow flag
0 [Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
1 [Setting condition]
TCNT overflowed from H'FFFF to H'0000 or underflowed from
H'0000 to H'FFFF
14
13
12
11
0
0
0
0
R/W
R/W
R/W
R/W
Complementary PWM mode:
Other modes: up-counter
5
4
—
—
1
1
—
—
5
4
—
—
1
1
—
—
10
9
8
7
0
0
0
0
R/W
R/W
R/W
R/W
H'84
3
2
—
OVIE
IMIEB
1
0
—
R/W
H'85
3
2
—
OVF
IMFB
1
0
—
R/(W)
R/(W)
*
Bit functions are the
same as for ITU0
H'86, H'87
6
5
4
3
0
0
0
0
R/W
R/W
R/W
R/W
up/down counter
ITU3
1
0
IMIEA
0
0
R/W
R/W
ITU3
1
0
IMFA
0
0
R/(W)
*
*
ITU3
2
1
0
0
0
0
R/W
R/W
R/W
597
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